- BAE Systems (San Diego, CA)
- …Other incentives may be available based on position level and/or job specifics. ** Design Verification Engineer - FPGA - (Sign-on Bonus)** **112648BR** ... advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification … more
- BAE Systems (San Diego, CA)
- …Other incentives may be available based on position level and/or job specifics. **Senior Design Verification Engineer - FPGA** **110464BR** EEO Career Site ... skills, and advancing your career. BAE is looking for experienced FPGA Design Verification Engineers who can develop and use verification environments.… more
- Arrow Electronics (Sunnyvale, CA)
- **Position:** Design Verification Engineer (eInfochips Inc) **Job Description:** **Role: Design Verification Engineer ** **Location: Sunnyvale CA ... 8+ year of experience in UVM. + Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will ... Engineering or Computer Engineering with 10+ years of experience in mixed signal design verification + Hands on experience in SV UVM, SV RNM and verification… more
- Cisco (San Jose, CA)
- …Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers... verification engineers, designers, hardware and cross-functional teams to verify… more
- Palo Alto Networks (Santa Clara, CA)
- …is to create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ... required - MSEE preferred + Minimum 10 years experience in ASIC design verification + Demonstrated success in taking ASIC products to mass production +… more
- Capgemini (San Francisco, CA)
- …**Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification (DV) Engineer_ **Location:** ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract...Develop timing model for the circuit working with layout engineer . + This role will provide the ability to… more
- Capgemini (San Francisco, CA)
- …**Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - CAD/EDA - Silicon Design / Verification Infrastructure ... **Job Summary:** We are seeking a skilled CAD Infrastructure engineer to support our ASIC design team....ensuring efficient design workflows, and supporting the design and verification of ASICs. **Required Skills:**… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** + Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will be ... Engineering or Computer Engineering 8+ years of experience in Mixed Signal Design Verification or MSc in Electrical Engineering or Computer Engineering with 6+… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the… more