• ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... innovative IPs for hardware security, clocking, voltage regulation and silicon correlation. + Collaborate with architects, circuit designers and...of ASIC design flow including front end design and verification , DFT, timing analysis, ECO,… more
    NVIDIA (05/30/25)
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  • ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …on the design . - Work with with architects, other designers, verification teams, pre- and post- silicon validation teams, synthesis, timing and back-end ... their cloud services. Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud… more
    Amazon (06/18/25)
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  • ASIC Physical Design Engineer

    Amazon (Cupertino, CA)
    …- come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...We get our hands dirty, from creating our own silicon , pushing the electrons in the right direction, ensuring… more
    Amazon (06/17/25)
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  • Principal RFIC Design Engineer

    Skyworks (Irvine, CA)
    Principal RFIC Design Engineer Apply now " Date:Jul...of Skyworks IP development team, you will work on silicon RF products as well as developing RF IPs ... Nearest Major Market:Irvine CaliforniaNearest Secondary Market:Los Angeles Job Segment: Design Engineer , Manufacturing Engineer , Front End,… more
    Skyworks (07/06/25)
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  • Principal Validation Engineer

    Microsoft Corporation (Mountain View, CA)
    …technical leadership with respect and integrity + Apply your expertise towards pre- silicon verification plans, tests, and debug of your area **Qualifications** ... plans and implement them by developing test content, scripts, tools, and other verification collateral + Execute content in post- silicon , triage, and debug… more
    Microsoft Corporation (07/23/25)
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  • Senior Physical Design Methodology…

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion Compiler to join our ... outstanding Networking Silicon engineering team, developing the industry's best high speed...Clock and Power distribution, Place and Route, Integration and Verification . + Staring knowledge of Physical design more
    NVIDIA (06/10/25)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... to be responsible for the micro-architecture and design including RTL design , synthesis, functional verification and timing analysis using innovative CAD… more
    NVIDIA (07/15/25)
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  • Senior Physical Design Methodology…

    NVIDIA (Santa Clara, CA)
    …NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our outstanding Networking Silicon engineering team, developing ... Clock and Power distribution, Place and Route, Integration and Verification . + Strong background with hierarchical design ...and Verification . + Strong background with hierarchical design approach, top-down design , budgeting, timing and… more
    NVIDIA (06/10/25)
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  • Staff RFIC Design Engineer

    Skyworks (Irvine, CA)
    Staff RFIC Design Engineer Apply now " Date:Jul 1, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting career in ... Secondary Market:Los Angeles Job Segment: Front End, Network, Telecom, Telecommunications, Design Engineer , Technology, Engineering Apply now " Find similar… more
    Skyworks (07/09/25)
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  • High Speed SerDes RTL Design

    Broadcom (San Jose, CA)
    …in advanced modulation formats.** + **Experience in integrating the front end design with DV for test methodologies and verification . Providing guidelines ... **Evaluating timing signoff, verification and IP Integration and system level verification .** + **Experience in design management with detailed knowledge of… more
    Broadcom (07/11/25)
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