- Amazon (Cupertino, CA)
- …expertise with state-of-the-art of 3D NAND flash memory with clear understanding of NAND device physics and failure mechanisms, as well as hands on experience ... with failure analysis and debug - Deep understanding of NAND media management policies and validation approach, SSD concepts such as wear-leveling, garbage collection, error-correction - Experience with SSD back end firmware, SSD controller and NAND… more
- Power Integrations (San Jose, CA)
- …high voltage AC/DC switching power supply. + Familiarity of analog circuit blocks and device physics . + Understanding of digital IC design. + Familiar with ... Cadence simulation tools, and Verilog. + Excellent written and oral communications with experience in specification creation, technical report writing, and test plans/instructions. Power Integrations is committed to building teams that drive innovation and… more
- Broadcom (San Jose, CA)
- …and Mentor Calibre/PERC + Solid background in programming skills, circuit design, and device physics knowledge to help solve circuit design, layout, physical ... verification, and post-layout extraction challenges and problems. + Experience in all phases of CAD tools from evaluation, QA, test, release, and user support to documentation + Expert in Cadence Skill, Perl, Unix Shell and utilities + Excellent interpersonal,… more
- Global Foundries (Santa Clara, CA)
- …and design rules + Experience with physical design, DRC, DFM + Familiarity with device physics + Familiarity with the tape-out process + Familiarity with PCMs, ... process KPIs + Familiarity with silicon manufacturing + Project management + Sales or Customer interface + Cross-functional project leadership/participation Expected Salary Range $94,300.00 - $231,600.00 The exact Salary will be determined based on… more
- SanDisk (Milpitas, CA)
- …datapath circuit designs for low power operating conditions + Working knowledge of device physics and process PREFERRED: + Working knowledge of NAND Flash ... memory circuit design including Analog, Core, Datapath and IO circuits is preferred. + Working knowledge of NAND flash memory cell operation is preferred. SKILLS: + The ideal individual must have proven ability to achieve results in a fast moving, dynamic… more
- SanDisk (Milpitas, CA)
- …methodologies. Familiarity with scripting (eg, Python, Perl, TCL) and an understanding of device physics in deep sub-micron technologies are a plus. + **Digital ... Design Enginee** r - Engineers in this role will be responsible for all aspects of digital design in advanced 3D NAND Flash memory, with a focus on microarchitecture, RTL design, verification, logic synthesis, and static timing analysis. The goal is to deliver… more
- NVIDIA (Santa Clara, CA)
- …+ Exposure to critical path analysis, power analysis, process technologies, transistor/ device physics , silicon reliability, and aging mechanisms. + Familiarity ... with Perl, C/C++, tool and script development, Windows and Linux OS is a plus. + Background with power supply and substrate noise analysis and mitigation. + Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software… more
- NVIDIA (Santa Clara, CA)
- …Background in critical path analysis, power/performance analysis, process technologies, and transistor/ device physics + Knowledge in digital design, circuit ... analysis, algorithms, computer architecture, silicon frequency and power, BIOS, drivers, and software applications Ways to stand out from the crowd: + Good debugging and analytical skills + Demonstrated ability to stay organized and manage multiple tasks… more
- NVIDIA (Santa Clara, CA)
- …+ Exposure to critical path analysis, power analysis, process technologies, transistor/ device physics , silicon reliability, and aging mechanisms. + Familiarity ... with Perl, C/C++, tool and script development, Windows and Linux OS is a plus. + Background with power supply and substrate noise analysis and mitigation. + Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software… more
- Broadcom (Irvine, CA)
- …CMOS digital circuits + Good understanding of transistor level circuit behavior and device physics + Knowledge of signal integrity, EM/IR, and reliability issues ... + Understanding of memory behavioral and physical models is a plus + Understanding of DFT schemes and chip level integration is a plus + Familiarity with test setups, silicon testing and debug is a plus + Comfortable in running simulators, writing automation… more