• Senior DFX Methodology Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior DFT Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
    NVIDIA (10/25/25)
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  • Sr. Full Chip Physical Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …bus routing, sequential pipeline planning and top level design for testability ( DFT ) planning + Collaborate with chip architects, ASIC engineers, package engineers ... hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT , partition hardening, special clock handling, feedthrough flows, special… more
    SpaceX (12/15/25)
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  • Senior Manager, Silicon Product and Test…

    Google (Sunnyvale, CA)
    …of test hardware development and bring-up. + Experience in test engineering, DFT , test hardware, and test program development (eg, Teradyne UltraFlex, Advantest 93k ... knowledge covering the full manufacturing flow, including high-volume production, fab, test, DFT , package assembly, and qualification. In this role, you will be… more
    Google (12/04/25)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved ... in one or more of these areas: + Synthesis, DFT , Logical Equivalency Checking + Low Power Design Implementation,...years of experience in Synthesis (Genus or Design Compiler), DFT and Logic Equivalency tools Or Cadence or Synopsys… more
    Cadence Design Systems, Inc. (12/03/25)
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  • Test Engineer (ATE)

    Broadcom (San Jose, CA)
    …analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test ... experience. + Strong knowledge of **digital and high speed test methodologies, scan/ DFT concepts, and pattern processing** . + Hands-on experience with **ATE… more
    Broadcom (12/11/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …timing convergence, such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes ... eg, scan, BIST, etc. + Understanding and timing closure of digital logic/macros in AMS designs/IPs. + Experience in methodology and/or flow development as well as automation. NVIDIA is widely considered to be the leader of AI computing, and one of the… more
    NVIDIA (12/10/25)
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  • Senior Hardware Design Engineer - Display…

    General Motors (Mountain View, CA)
    …design for manufacturing (DFM), design for assembly (DFA), and design for testing ( DFT ) + Drive the validation and testing of hardware components and systems, ... for manufacturing (DFM), design for assembly (DFA), and design for testing ( DFT ) + Excellent problem-solving, analytical, and communication skills. + Proven ability… more
    General Motors (12/05/25)
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  • Staff Static Timing Analysis Lead, Cloud

    Google (Sunnyvale, CA)
    …you will work with architecture, logic design, and Design for testing ( DFT ) teams to fully implement cross-functional design requirements. The AI and Infrastructure ... timely and effective solutions. + Lead collaboration with RTL design and DFT team for high quality integrations and timing constraints. Information collected and… more
    Google (12/04/25)
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  • Director, Hardware Engineering

    Cisco (San Jose, CA)
    …production test. 5) Provide technical leadership in Design for Test ( DFT ), scan/ATPG, analog/mixed-signal test, high-speed SERDES bring-up and validation, and defect ... design, and high-volume manufacturing test flows. + Proven experience in DFT , scan/ATPG, mixed-signal validation, SERDES testing, and post-silicon bring-up. + Strong… more
    Cisco (12/02/25)
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  • PCB Fab DFM/SMT Engineer

    Snap Inc. (Palo Alto, CA)
    …PCB products. The engineer ensures that PCB designs adhere to DFM/ DFT /DFR guidelines, oversees SMT processes, troubleshoots manufacturing issues, and optimizes ... Valor, & NX preferred). + Experience reviewing and generating DFM, DFA, DFT documentation. + Ability to interpret fabrication drawings, assembly files, stack-ups,… more
    Snap Inc. (11/27/25)
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