• SOC Architect

    Meta (Sunnyvale, CA)
    …the full stack from algorithms and architecture down to drawing polygons. 4. Appreciate DFT /DFM and will ensure that custom silicon does not dominate COGs in the ... final products. 5. Have experience in overseeing a small silicon team. **Minimum Qualifications:** Minimum Qualifications: 6. Master's degree (or foreign degree equivalent) in Electrical Engineering, Mechanical Engineering, Applied Sciences, or related field… more
    Meta (08/15/25)
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  • Manufacturing Engineer, Product Operations

    Google (Sunnyvale, CA)
    …with Python/SQL scripting. + Understanding of CMOS devices, fabrication processes, ATE test, DFT , quality, and reliability. Be part of a team that pushes boundaries, ... developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences,… more
    Google (08/15/25)
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  • ASIC Engineering Technical Leader - SDC

    Cisco (San Jose, CA)
    …include:** + Oversee fullchip SDCs and work with the Physical Design and DFT teams to close fullchip timing in multiple timing modes. + Assist with ... the development of efficient methodology to promote block level SDCs to fullchip, and to bring fullchip SDC changes back to block level. + Assist with the development and apply methodology to ensure correctness and quality of SDCs as early as possible in… more
    Cisco (08/14/25)
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  • Principal Analog Engineer

    Microsoft Corporation (Mountain View, CA)
    …design teams. + Interface with architecture, physical design (PD), design for test ( DFT ), and other teams to optimize tradeoffs within the design + Provide technical ... leadership through mentorship and teamwork **Qualifications** **Required/minimum qualifications** + Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree… more
    Microsoft Corporation (08/14/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …responsibilities - integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of the ASIC design ... team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.… more
    Amazon (08/14/25)
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  • Senior Principal Systems Engineer RF Sensor

    General Atomics (Poway, CA)
    …Manifold, Doppler, Pulse Doppler, Waveform, Interferometry, Phase Shift, CFAR, DFT , Multi-Static, DSP, Digital Signal Processing **Salary:** $128,130 - $229,358 ... **Travel Percentage Required** 0 - 25 **Relocation Assistance Provided** Provided **US Citizenship Required?** Yes **Clearance Required?** Desired **Clearance Level** Senior (8+ years) **Workstyle** Hybrid General Atomics is committed to hiring and retaining a… more
    General Atomics (08/14/25)
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  • Senior Manager, Machine Learning Manufacturing…

    Google (Sunnyvale, CA)
    …value and quality through test coverage, closed-loop feedback, and Design For Testability ( DFT ). As Senior Manager of Machine Learning NPI Test Engineering, you will ... be responsible for delivering the end-to-end manufacturing test strategy supporting the new product introduction of all GPU and TPU products in the machine learning portfolio. You will ensure that your team and our external manufacturing partners execute all… more
    Google (08/14/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …synthesis and verification, knowledge of Place and Route, and understanding of Design-for-test ( DFT ) is a plus. + Proficiency in scripting language, such as, Perl, ... Tcl, Make and automation methods/algorithms is a plus. + Prior leadership experience is a plus. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000… more
    NVIDIA (08/13/25)
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  • PCB Design Layout Engineer

    NVIDIA (Santa Clara, CA)
    …design and consideration for layout, routing, and timing constraints, DFM, DFA, and DFT constraints in volume manufacturing is helpful. + You should have an ... understanding of High-Density Interconnect PCB layout and PCB Signal Integrity. + Proven ability to work with a team while taking personal responsibility for your own contributions + Agility in changing focus as the needs of our effort evolve + Strong… more
    NVIDIA (08/13/25)
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  • Technical Program Manager III, Manufacturing Test…

    Google (Sunnyvale, CA)
    …value and quality through test coverage, closed-loop feedback and Design For Testability ( DFT ). Behind everything our users see online is the architecture built by ... the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding… more
    Google (08/13/25)
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