• ASIC Engineer, DFT

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and ... are looking for individuals with a background in Design for Testability ( DFT ) methodologies and implementation for IP/SOC, with demonstrated use and understanding of… more
    Meta (07/25/25)
    - Related Jobs
  • DFT Design Engineer, AWS Machine Learning…

    Amazon (Austin, TX)
    …Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to integrate DFT ... Work with physical design team to setup and implement DFT insertion flow * Develop high coverage and cost...insertion flow * Develop high coverage and cost effective DFT methodologies * Perform RTL coding and Verification *… more
    Amazon (08/04/25)
    - Related Jobs
  • ASIC DFT Engineer I, Annapurna Labs

    Amazon (Austin, TX)
    …Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to integrate DFT ... Work with physical design team to setup and implement DFT insertion flow * Develop high coverage and cost...insertion flow * Develop high coverage and cost effective DFT methodologies * Perform RTL coding and Verification *… more
    Amazon (07/02/25)
    - Related Jobs
  • Sr Principal DFT Application Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain insertion, compression scan ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
    Cadence Design Systems, Inc. (06/06/25)
    - Related Jobs
  • Lead Software Engineer, DFT /Atpg

    Cadence Design Systems, Inc. (Austin, TX)
    …engineer to work with the Modus Test R&D team working on Design For Test ( DFT ) and Automatic Test Pattern Generation (ATPG) Software. What You'll Be Doing + Work as ... worldwide + Develop software tools in C/C++ to support DFT /ATPG + Research and develop software solutions to allow...Out From The Crowd + Experience in VLSI and/or DFT /ATPG. + Experience with multi-threading and distributed software +… more
    Cadence Design Systems, Inc. (07/18/25)
    - Related Jobs
  • Test Design Hardware Developer

    IBM (Austin, TX)
    …delivering testable, high-performance silicon in innovative ways. We're looking for a DFT Engineer who values teamwork and brings hands-on experience with Synopsys ... Test Design Engineer, you will be responsible for architecting and implementing DFT strategies for complex SoC designs using Synopsys toolsets. You will collaborate… more
    IBM (07/25/25)
    - Related Jobs
  • Senior Physical Design Engineer

    Microsoft Corporation (Austin, TX)
    …Engineer** to join the team. **Responsibilities** + Accountable for Design-for-Test ( DFT ) & Functional mode Timing Analysis and convergence within the Physical ... Design (PD) domain. + Facilitate coordination across cross-functional teams, including DFT , RTL/Design/IP, Static Timing Analysis (STA), CAD, Architecture, Power &… more
    Microsoft Corporation (08/08/25)
    - Related Jobs
  • Senior Product Engineer

    onsemi (Richardson, TX)
    …business P&Ls on new product development activities, including defining Analog/Digital DfT and test strategies, developing low-cost test solutions for complex ... RF, and mixed-signal, along with knowledge of ATE platforms, DfT strategies and test methods, and test instrumentation requirements...is a must. Must have prior hands-on experience working DfT , ATE Test Equipment for IC testing, and good… more
    onsemi (08/09/25)
    - Related Jobs
  • Technical Program Manager III, Foundry Commodity…

    Google (Austin, TX)
    …cross-functional or cross-team projects. + Experience with design for testability ( DFT ) concepts and methodologies (eg, scan, JTAG, MBIST). + Experience with ... to achieve timing closure, power optimization, and area goals. + Incorporate Design-for-Test ( DFT ) features such as scan chains, JTAG, and MBIST to enable efficient… more
    Google (08/22/25)
    - Related Jobs
  • ASIC Implementation Engineer - Synthesis

    Meta (Austin, TX)
    …5. Perform RTL Lint and work with the Designers to create waivers 6. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults 7. Develop Timing ... Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks 8. Developing Automation scripts and Methodology for all FE-tools… more
    Meta (07/20/25)
    - Related Jobs