• Material Process Technician 1

    Northrop Grumman (Manhattan Beach, CA)
    …quality in accordance with statistical process or other control procedures. May design experiments. May be required to ensure correct functioning and identify any ... with Destructive Physical Analysis Lab equipment (such as microscopes, bond-pull, die -Shear, SEM/EDX, cross-sectioning, etc.) + Good verbal & written communication… more
    Northrop Grumman (08/24/25)
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  • Staff Semiconductor Process Engineer

    Lockheed Martin (Goleta, CA)
    …flip\-chip hybridization techniques or related processes, such as epoxy die attach/bonding, polishing, substrate removal, or Anti\-Reflection \(AR\) coating or ... to multi\-task, organize and prioritize assignments independently\. * Experience in Design of Experiments \(DOE\), statistical process control \(SPC\), and data… more
    Lockheed Martin (08/21/25)
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  • Senior Optical Test and Automation Engineer,…

    Google (Sunnyvale, CA)
    …+ Operate electrical and optical probe stations at the wafer, die , chip, and module levels, conduct high-frequency measurements, and analyze wafer ... field failures of optical transceiver modules. Drive issues to closure with the design team to implement preventive measures. + Install, test, repair, and validate… more
    Google (08/13/25)
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  • Sr. Process Engineer - Semiconductor Packaging…

    Skyworks (Irvine, CA)
    …semiconductor prototype assembly for processes such as Solder Printing, SMT, Reflow, Die Attach, Wire Bond, Molding, Laser Marking, and Dicing equipment. Other tasks ... CaliforniaNearest Secondary Market:Los Angeles Job Segment: Mechanical Engineer, Package Design , Night, Process Engineer, Network, Engineering, Manufacturing, Operations, Technology… more
    Skyworks (08/01/25)
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  • Senior Resiliency and Safety Architect

    NVIDIA (Santa Clara, CA)
    …+ Run simulations to analyze Architectural Vulnerability Factor and Liveness of on- die memory + Develop diagnostics software components for Resiliency and Safety to ... ASPICE (Automotive SPICE)). This includes defining requirements, architecture, and design with end-to-end traceability, performing safety analyses - FMEA/DFA/FTA and… more
    NVIDIA (06/13/25)
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