• RF Packaging Engineer

    Eliassen Group (Sacramento, CA)
    …manage packaging documentation including SOWs, package drawings, and process flows + Design and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, ... in conjunction with manufacturing engineers + Utilize your assembly knowledge of die attach, Wirebond, bumping, overmolding to advise product groups on options… more
    Eliassen Group (12/06/25)
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  • Senior Signal and Power Integrity Engineer

    NVIDIA (Santa Clara, CA)
    …crafting creative Signal and Power Integrity solutions to complex system design problems. + System-level power integrity simulations of high-performance AI systems, ... + Work closely with VLSI power teams and package/board design teams to design , optimize, and model...power or I/O power. + Strong understanding of how die /package/board decoupling impacts power supply noise across different frequency… more
    NVIDIA (12/22/25)
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  • Manufacturing Technician - Night shift

    Keysight Technologies, Inc. (Santa Rosa, CA)
    …innovation, delivering breakthroughs and trusted insights in electronic design , simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 ... seeking a detail-oriented and motivated individual to join our Die Fab department in the Separation area. This team...engineering teams, area trainers, and fellow operators to support Die Fab's mission and production goals. While collaboration is… more
    Keysight Technologies, Inc. (12/18/25)
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  • ASIC DFT DV Technical Leader

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality...test strategy aspects for new silicon device models, bare die & stacked die , driving re-usable test… more
    Cisco (12/13/25)
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  • Tooling Engineer

    Meta (Sunnyvale, CA)
    …as well as production efforts through hands on collaboration with Product Design , Manufacturing, and Quality Assurance while playing a crucial role in research, ... of future products. **Required Skills:** Tooling Engineer Responsibilities: 1. Lead the design and development of new plastic injection mold tooling to meet strict… more
    Meta (12/20/25)
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  • Staff Mechanical Engineer

    Philips (San Diego, CA)
    …across Innovation, NPI and Sustaining projects for a wearable medical device + Design high-volume die cut and converted parts and assemblies suitable for ... Mechanical Development Engineer who will be responsible for the mechanical design and development of wearable medical monitoring devices, accessories, and associated… more
    Philips (12/16/25)
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  • Process Development Engineer

    Teledyne (Mountain View, CA)
    …and die attach (preferred) + Knowledge of process tooling design and application (preferred) + Familiarity with AS9100/ISO9001 standards and lean manufacturing ... factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration… more
    Teledyne (10/15/25)
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  • Principal Silicon Validation Engineer

    Blue Cheetah Analog Design (Sunnyvale, CA)
    …Engineer Engineer [On-site Position - Sunnyvale, CA] Blue Cheetah Analog Design Inc. is a semiconductor technology start-up headquartered in Sunnyvale, California. ... Our mission is to generate state-of-the-art in package die -to- die semiconductor IP solutions for the rapidly...fundamentals & coursework focused on digital & analog circuit design * 5+ years of hands-on electrical test &… more
    Blue Cheetah Analog Design (10/13/25)
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  • Packaging Engineer

    Texas Instruments (Santa Clara, CA)
    …across the SC Packaging organization. **Responsibilities may include:** + To define, design , develop and scale to volume production high voltage (200-3300V) packages ... must have a broad knowledge of the material supplier landscape (mold compounds, die attach, substrates) for high voltage applications as well as process / equipment… more
    Texas Instruments (12/26/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …support. **Key Responsibilities:** + Responsible for development of the comprehensive Design -for-Test (DFT) & DFx solutions and architectures that support ATE ... screening, in-system test, debug and diagnostics needs of the design . + Lead the RTL implementation from the architecture...test strategy aspects for new silicon device models, bare die & stacked die , driving re-usable test… more
    Cisco (11/12/25)
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