• ASIC DFT Product Lead

    Cisco (Portland, OR)
    …& IP integration; Experience leveraging functional verification routines for DFT DV.DFT CAD development & EDA interactions - Test Architecture, Methodology and ... including memory BIST and boundary scan. + Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime + Prior experience with… more
    Cisco (07/05/25)
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  • Senior Physical Design Engineer

    Microsoft Corporation (Hillsboro, OR)
    …as Synopsys, and Cadence tool suites. + Partner effectively with PD, DFT, STA flow, CAD teams, and EDA tool vendors to ensure seamless integration and execution. ... across cross-functional teams, including DFT, RTL/Design/IP, Static Timing Analysis (STA), CAD , Architecture, Power & Performance, and both internal and external… more
    Microsoft Corporation (08/08/25)
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  • ASIC Devlopment Manager (Tektronix)

    Ralliant (Beaverton, OR)
    …ASIC Development Manager to lead and grow a multidisciplinary team across ASIC CAD Engineering, Hardware Verification, and ASIC Packaging. This role goes beyond team ... Build, manage, and mentor a high-performing team of analog ASIC designers, CAD engineers, verification specialists, and packaging experts. + Work with program… more
    Ralliant (07/15/25)
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