- Applied Materials (Santa Clara, CA)
- …ICs, ensuring optimal performance, thermal management, and reliability. + Simulation and Analysis : Utilize simulation tools to analyze the electrical , thermal, ... produce virtually every new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our customers manufacture display… more
- NVIDIA (Santa Clara, CA)
- …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... to see: + Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science. + 8+...understanding of ASIC design flow including RTL design , verification, logic synthesis, timing analysis and… more
- NVIDIA (Santa Clara, CA)
- … and fixing of timing paths through ECOs including crosstalk and noise analysis . + Expertise in physical design and optimization eg, placement, routing, ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs and… more
- GE Aerospace (San Francisco, CA)
- …state of the art analysis tools. + Create layout constrains and maintain/run Design for Manufacturing & Design rule checks. + Create PWB stack-ups and via ... **Job Description Summary** Activities contributing to the design and development of products, solutions and systems. Includes activities linked to technical… more
- NVIDIA (Santa Clara, CA)
- …to see: + BSEE (or equivalent experience) with 4 years' experience in circuit design or MS preferred in Electrical , Computer Engineering with 3 years' experience ... is required. + Experience in Spice simulation and analysis . + Understanding of timing closure, interconnect design... analysis . + Understanding of timing closure, interconnect design , and custom circuits are required. + Understanding of… more
- SanDisk (Milpitas, CA)
- …areas: system validation, system integration, software development, NAND device, storage device design and testing, failure analysis , data analysis , testing ... of the role focus on validation of memory system design on Sandisk's enterprise SSD products + In-depth understanding...Perform end-of-life (EOL) reliability verification tests + Perform failure analysis on EOL and other FW maturity test failures… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...MS (or equivalent experience) + Knowledge of Static Timing Analysis (STA) + Knowledge of physical design … more
- Tarana Wireless (Milpitas, CA)
- …wireless performance tests are desired. Minimum qualifications include a bachelor's degree in electrical engineering and 15 years of hardware design and test. ... for a smart, experienced, and hardworking member working to design and test Hardware systems in different configurations. The...What You'll Need: + Bachelor's degree (MS preferred) in Electrical Engineering with 15+ years of relevant Experience +… more
- NVIDIA (Santa Clara, CA)
- …Analyze PCB designs for manufacturability (DFM) and identify issues early in the design cycle. + Collaborate with hardware, layout, and manufacturing teams to ensure ... design intent aligns with production capabilities. + Use CAD...and DFM guidelines across teams. + Support root cause analysis and resolution of manufacturing issues during new product… more
- Google (Mountain View, CA)
- **Minimum qualifications:** + Bachelor's degree in electrical engineering or related technical field. + 5 years of experience with digital logic design ... qualifications:** + 8 years of experience with digital logic design principles, RTL design concepts, and languages.... **Responsibilities:** + Participate in test plan and coverage analysis of the block and SOC-level verification and assist… more