- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our outstanding Networking Silicon ... projects. What we need to see: + MS in Electrical or Computer Engineering (or equivalent experience) + Minimum...Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power … more
- NVIDIA (Santa Clara, CA)
- …and design the GPU or CPU clocks to satisfy all the architectural/ design /physical constraints. + Improve Power , Performance, and Area (PPA) of innovative ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...design + Understanding of system level artifacts like power , noise, etc + Experience with scalable designs and… more
- Amazon (Cupertino, CA)
- …with emphasis on signal integrity - Proven track record in impedance control, stack-up design , and power integrity optimization - 7+ years of experience in board ... optimization - Advanced routing techniques for high-speed interfaces - EMI/EMC compliance and design considerations - Power delivery network (PDN) design and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Package Design Engineer in the Advanced Technology Group (ATG). NVIDIA's GPUs and SOCs are the world leaders in power , ... a wide range of sectors. To this purpose, we are now seeking a passionate Package Design Engineer who is committed to making a difference in the world through… more
- Snap Inc. (Los Angeles, CA)
- …density designs with careful consideration of analog, RF, high speed, and/or power circuits. + Demonstrated understanding of IPC, Design for Manufacturability ... Hardware team at Snap Inc! What you'll do: + Work closely with electrical , mechanical, and manufacturing engineers to produce industry leading flexes and printed… more
- NVIDIA (Santa Clara, CA)
- …that help power these chips. What you'll be doing: + Design best-in-class SRAM circuits using state-of-the-art technology processes + Optimize circuits for ... We are now looking for a Senior SRAM Engineer ! The Full Custom Macro team at NVIDIA...array of processing chips. Be it high speed, low power , multiport, we engage closely with processor architecture teams… more
- Google (Mountain View, CA)
- ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... an emphasis on computer architecture. + 10 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing closure,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the ... and last-level caches , working closely with the physical design team on implementation, synthesis and timing closure as... teams responsible for achieving timing, area, performance and power goals of the unit. + Help define the… more
- Siemens (Cypress, CA)
- …satisfaction and job profitability. **"This is a remote position"** **As a Fire Alarm Systems Design Engineer , you will:** + Design fire alarm systems for ... that improve people's lives. **Transform the everyday with us!** **Fire Alarm Systems Design Engineers** create unique design solutions to meet specific customer… more
- Google (Mountain View, CA)
- Quantum Device Design Engineer , Quantum AI _corporate_fare_ Google _place_ Goleta, CA, USA; Mountain View, CA, USA **Mid** Experience driving progress, solving ... View, CA, USA** . **Minimum qualifications:** + Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical… more
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