• Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …a huge success with our customers. With Cadence(R) Protium (TM) prototyping platforms, design and verification teams can rapidly bring up a prototype and provide a ... Protium is leading product in FPGA Emulation/Prototyping domain. This role is to design , verification, timing closure and hardware validation of the FPGA IPs. +… more
    Cadence Design Systems, Inc. (08/08/25)
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  • ASIC Engineer , IP Design , Silicon

    Google (Mountain View, CA)
    **Minimum qualifications:** + Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical ... experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting language like Python or Perl. +… more
    Google (08/20/25)
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  • Sr. ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    …party IP blocks -Estimate power, performance, and area for significant IPs early in design cycle -Execute on design specifications to deliver high quality RTL ... and lead a scalable team Basic Qualifications -Bachelor's degree in Electrical Engineering, Communications Engineering or related field, or equivalent experience… more
    Amazon (07/19/25)
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  • Senior ASIC Design Engineer

    Amazon (San Diego, CA)
    …refugee or granted asylum. Basic Qualifications . Bachelor's degree in Electrical Engineering, Communications Engineering or related field, or equivalent experience ... . 7+ years in digital design , preferably in communication systems . Experience with products...techniques Preferred Qualifications . Master's or Ph.D degree in Electrical / Communications Engineering . 10+ years in digital… more
    Amazon (07/09/25)
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  • R&D Engineer Physical Design

    Broadcom (San Jose, CA)
    …major segments of the Semiconductor industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ... through product release. Become a member of an ASIC design team responsible for all aspects of physical ASIC...error free artwork/mask release. Requirements: + BS Degree in Electrical Engineering and 8+ years related experience or MS… more
    Broadcom (06/03/25)
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  • Structural & Payload Design Engineer

    The Boeing Company (Long Beach, CA)
    …reviewing drawings, models, specifications, and other technical documentation to ensure design & manufacturability of spare parts) + Building technical data packages ... process to improve effectiveness, quality and efficiency + Experience in design release processes, policies and procedures, handling tooling issues, supplier driven… more
    The Boeing Company (08/10/25)
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  • Senior System Design Engineer , SSD…

    SanDisk (Milpitas, CA)
    …Main responsibilities of the role focus on validation of memory system design on Sandisk's enterprise SSD products + In-depth understanding of NAND management ... algorithms and testing methodologies + Design and development of test cases for new memory...**Qualifications** REQUIRED: + BS/MS in Computer Engineering, Computer Science, Electrical Engineering, or other related fields + 2+ years… more
    SanDisk (07/31/25)
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  • Physical Design Methodology Engineer

    quadric.io, Inc (Burlingame, CA)
    …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... to optimize PPA. Requirements + MS or Ph.D. in Electrical Engineering with a minimum of eight years of...in chip front-end and back-end implementation tools such as Design Compiler, PrimeTime, ICC2 & Fusion Compiler. + Experience… more
    quadric.io, Inc (06/09/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary ... need to see: + BS or MS degree in Electrical Engineering or equivalent experience + 12+ year of...of experience demonstrated ability working in high-speed I/O digital design , knowledge at protocol level (SATA, PCIE, USB) preferred… more
    NVIDIA (08/08/25)
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  • System Design Validation Engineer

    NVIDIA (Santa Clara, CA)
    …to amplify human creativity and intelligence. NVIDIA is looking for motivated System/Board Design Validation Engineers to use your creativity to work on NVIDIA with ... express, Camera related interface and other various I/Os + Responsibility includes signal electrical test, functional check, debug and build reports. + Work with … more
    NVIDIA (07/17/25)
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