- Google (Sunnyvale, CA)
- …and interests to apply! **Minimum qualifications:** + PhD degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent ... or internship experience in advanced topics such as heterogeneous computing, low- power design, advanced packaging, or AI/ML hardware acceleration. + Experience with… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's leading ... to influence the design and development of the next generation GPU and SoC, allowing you to have real...What we need to see: + Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent… more
- NVIDIA (Santa Clara, CA)
- …the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer ... You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level...timing, area, congestion tradeoffs + Drive timing closure and power /area optimization across multiple design blocks + Work with… more
- Celestica (San Jose, CA)
- …Country: USA State/Province: California City: San Jose **Summary** Signal integrity engineer provides design guideline and support to system architecture design, ... and makes design adjustments as needed. The Signal integrity engineer works in cross functional teams with other designers,...HFSS 3D. + Strong knowledge in Signal Integrity and Power Integrity fundamental concepts. + Strong experience in Package… more
- Amazon (San Diego, CA)
- …modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: . Implement wireless system ... system specification to chip specification to RTL to optimizing timing / power to chip level validation . Develop solutions optimizing customer experience… more
- Google (Mountain View, CA)
- **Minimum qualifications:** + Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience. + 8 years of experience in DFT or ... physical design. + Experience with scan insertion, Automatic Test Pattern Generation (ATPG), gate level simulations and silicon debug, low power designs,… more
- Cisco (San Jose, CA)
- Hardware Modeling Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441704) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... design group. You'll be part of our team driving Cisco Silicon One's next- generation network devices, working in a dynamic environment that combines startup agility… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... PD, DFT, Package and SW teams to develop next generation ASICs. + Perform diagnostic and post silicon validation...and customer failures. **Minimum Qualifications:** + Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC… more
- Northrop Grumman (Sunnyvale, CA)
- …support of new and existing designs used in surface ship and submarine propulsion and power generation systems for the US Navy based out of **Sunnyvale, CA** . ... to translate customer requirements into hardware and software specifications. + Generation and updating of System and sub-system level specifications in DOORS,… more
- Palo Alto Networks (Santa Clara, CA)
- …with precision. **Your Career** We are seeking an experienced Big Data Software Engineer to design, develop and deliver next- generation technologies within our ... few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is...develop and implement highly scalable software features on our next- generation security platform as part of our Prisma Access… more