- Meta (Sunnyvale, CA)
- **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and ... next generation AI and Augmented Reality solutions.As a Digital Design Engineer (DDE), you will be a...Python, or similar scripting experience 15. Familiarity with low-power design techniques 16. Experience using C for… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...12+ years of hands-on experience in SystemVerilog/UVM methodology and/or C / C ++ based verification 10. 12+ years experience… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C / C ++ based verification 9. 6+ years of… more
- Meta (Sunnyvale, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...verification environments using SystemVerilog and UVM Write tests in C to run out of the CPU Identify and… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...environments using SystemVerilog and UVM - Write tests in C to run out of the CPU - Identify… more
- Arrow Electronics (Sunnyvale, CA)
- **Position:** Design Verification Engineer (eInfochips Inc) **Job Description:** **Role: Design Verification Engineer ** **Location: Sunnyvale CA (Hybrid ... 8+ years of experience in System Verilog HVL and C ++/ C + At-least 8+ year of experience...a leading global provider of product engineering and semiconductor design services. A rich history of over two decades,… more
- The Boeing Company (El Segundo, CA)
- …& Weapons Systems has an exciting opportunity for a **Computer Architect/Embedded Computing Systems Design Engineer (Lead or Senior)** to join us as part of our ... SI&WS Electronics design team located in **El Segundo, CA.** If you...have an exciting opportunity for you. As a Computer Engineer Architect on our SI&WS Electronics team at Boeing… more
- Meta (Sunnyvale, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with ... state of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with...9. 2+ years of hands-on experience in Verilog, SystemVerilog, C / C ++ based verification and UVM methodology 10.… more
- Meta (Sunnyvale, CA)
- …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with ... state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators...8+ years of hands-on experience in SystemVerilog/UVM methodology and C / C ++ based verification 10. 8+ years of… more