• Engineer Associate (Tactical Network…

    General Dynamics - GDIT (San Diego, CA)
    Type of Requisition: Pipeline Clearance Level Must Currently Possess: Secret Clearance Level Must Be Able to Obtain: Secret Public Trust/Other Required: None Job ... Launch your engineering career on the Navy's front lines as an Engineer Associate with GDIT. You'll support Naval Information Warfare Center Pacific (NIWC… more
    General Dynamics - GDIT (09/29/25)
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  • Senior AV Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …carry out critical events - on-site or virtual for senior managements and C- level executives + Collaborate with various IT functions for implementation and support ... 7-8 years of hands on experience as an AV Engineer + Excellent communication skill is a must for...within the organization - Business Stakeholders, Senior Managers, and C- Level Execs + Must have one full cycle project… more
    Cadence Design Systems, Inc. (09/26/25)
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  • Field Service Engineer I - Semiconductor

    Canon USA & Affiliates (Irvine, CA)
    **About the Role** Canon USA, Inc. has an exciting, entry level opportunity in California to support our photolithography equipment customers and enable them to ... minimizing equipment down time. Escalate advanced repairs as needed, to senior level technicians. - Monitor, inspect and maintain semiconductor equipment in order to… more
    Canon USA & Affiliates (09/17/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This ... with strong analog design background (or equivalent experience) + 2 years analog design experience in industry + CMOS...in crafting test bench environments for component and top level circuit verification + Behavioral modeling of analog and… more
    NVIDIA (09/09/25)
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  • Principal Engineer , Packaging Engineering

    SanDisk (Milpitas, CA)
    …moving forward. **Job Description** ESSENTIAL DUTIES AND RESPONSIBILITIES: + As a Packaging Engineer , you will work in the Packaging R&D group on thermal designs ... across semiconductor packaging level , flash product printed circuited board assembly (PCBA) ...limited to (1) relevant education; qualifications; certifications; and experience; ( 2 ) skills, ability, knowledge of the job; (3) performance,… more
    SanDisk (09/05/25)
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  • Senior Design Verification Engineer , HW…

    Amazon (Sunnyvale, CA)
    …powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part ... ARM and various DSP ISA Experience with CPU block level testing Experience debugging system- level issues Good...C/C++ and scripting skills in Python, Tcl, and/or Perl 2 years or more of practical experience Working experience… more
    Amazon (09/04/25)
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  • Thermo Mechanical Design Engineer

    Broadcom (San Jose, CA)
    …login account before you apply for a job. (Click Sign In > Create Account)** ** 2 . If you already have a Candidate Account, please Sign-In before you apply.** **Job ... Description:** We are seeking a highly motivated Mechanical Engineer with expertise in system enclosure design and liquid cooling infrastructure to join our dynamic… more
    Broadcom (08/30/25)
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  • Principal / Senior Principal Network Systems…

    Northrop Grumman (Los Angeles, CA)
    …analysis, troubleshooting, and optimization to support mission-critical operations + Provide SME- level support and guidance to teams, ensuring adherence to best ... and flight safety requirements Basic Qualifications - Principal Network System Engineer : + Bachelor's of Science in Computer Science, Information Technology,… more
    Northrop Grumman (08/21/25)
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  • Senior Signal and Power Integrity Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... Signal and Power Integrity solutions to complex system design problems. + System- level power integrity simulations of high-performance AI systems, graphic cards, and… more
    NVIDIA (08/21/25)
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  • RTL Synthesis Engineer

    Broadcom (San Jose, CA)
    …please Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level RTL synthesis engineer . In this highly visible role, you will be ... Synthesis using advanced optimization techniques and generating optimized Gate Level Netlist for Timing, Area, Power.** + **Debug the timing/area/congestion… more
    Broadcom (08/08/25)
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