• Sr. Embedded Software Engineer

    Panasonic Avionics Corporation (Irvine, CA)
    …hardware architectures as well as verifying hardware through software. High- level architecture development in C/C++, hardware device drivers, networked client-server ... + Conducts analysis to define, analyze and allocate requirements. Prepares program- level and user- level documentation. + Supports system test programs… more
    Panasonic Avionics Corporation (12/10/25)
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  • SW Engineer

    Broadcom (San Jose, CA)
    …802. 3 ) and network protocols (TCP/IP, UDP, ARP) up to Layer 3 . + **Hardware Interface:** Proven experience with low- level hardware interaction, including ... Interface Card (NIC) drivers that operate at the kernel level . The ideal candidate will have deep expertise in.... The ideal candidate will have deep expertise in low- level programming, network protocols (L2/L3), and kernel internals across… more
    Broadcom (11/13/25)
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  • Principal or Sr. Principal Software…

    Oracle (Santa Clara, CA)
    …team is building a foundational platform that powers OCI services-from low- level execution runtimes and cluster management to application orchestration and advanced ... environments-this is your opportunity to make a difference. Career Level - IC4/IC5/IC6 **Responsibilities** Bring your strong technical, analytical, and… more
    Oracle (11/25/25)
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  • Principal Engineer , Hardware Development…

    Western Digital (Fremont, CA)
    …create action items and recommendations to resolve the production yield and quality issues. 3 . To perform and/or coordinate wafer level F/A activities related to ... TMR deposition processes, such as TEM analysis, wafer level SPC audit to identify possible root causes for...we anticipate that the application deadline will be **03-01-2026** ( 3 months from posting), although we reserve the right… more
    Western Digital (12/18/25)
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  • Senior Motor Control Engineer

    DoorDash (San Francisco, CA)
    …you will + Design and implement field-oriented control (FOC) of PMSM and low- level diagnostics algorithms using MATLAB and Simulink + Tune control algorithms to ... optimize powertrain performance using closed-loop simulation, dyno testing and robot- level testing + Build infrastructure (plant models, functional models) to… more
    DoorDash (11/25/25)
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  • Chip Integration Engineer

    Broadcom (San Jose, CA)
    …1). Defining in the microarchitecture and implementing design of chip top level modules for L2/L3 Network Switching and routing ASICs and various subsystems ... within these chips. 2). Doing chip level integration and putting all the functional blocks, soft/hard...blocks, soft/hard IPs, IOs, and memories together as specification. 3 ). Cooperating with other design teams on the microarchitecture… more
    Broadcom (11/19/25)
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  • Principal Optical Engineer of Optics…

    Oracle (Sacramento, CA)
    …background covering numerous areas of network hardware engineering including cabling, low level device performance, thermals, etc. As OCI is a cloud-based network ... and the buildout of a standardized cabling solution by defining high- level objectives and delivery procedures. Organizes project technical landmarks & supporting… more
    Oracle (11/25/25)
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  • Field Application Engineer -- Northwest…

    Qnity (Sunnyvale, CA)
    …preferred. + Minimum of 5 years experience in a similar position. + Minimum of 3 years experience with component level or subsystem level design exp ... an extension of OEM design teams from the system to component level + Some combination of thermal, electromagnetic, mechanical, and electrical design experience… more
    Qnity (12/02/25)
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  • Senior Firmware Engineer

    NVIDIA (Santa Clara, CA)
    …pay of employees in similar positions. The base salary range is 148,000 USD - 235,750 USD for Level 3 , and 184,000 USD - 287,500 USD for Level 4. You will ... Verification team, you will be responsible for performing unit and integration- level firmware verification across both pre-silicon and post-silicon platforms. You… more
    NVIDIA (11/19/25)
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  • Principal Engineer , Systems Design…

    SanDisk (Milpitas, CA)
    …testing and screening methods + Work with the validation team on drive- level testing, debugging, failure analysis and qualification + Prepare and present reports ... relevant systems design PREFERRED: + Knowledge of programming in high- level languages (eg C, C++, Python) is a plus....we anticipate that the application deadline will be **12/02/2025** ( 3 months from posting), although we reserve the right… more
    SanDisk (12/19/25)
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