• Senior CAD Automation Engineer

    Capgemini (Irvine, CA)
    design tools such as Cadence Virtuoso and Calibre DRC/LVS. + Demonstrated experience supporting analog and digital design flows. + Excellent ... Administer and maintain the CAD EDA environment for analog, digital , photonics, and package design teams. +...creation of automated regression testing frameworks. **Your Skills and Experience ** + Bachelor's or Master's degree in a relevant… more
    Capgemini (07/24/25)
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  • Electrical Engineer

    Fresh Consulting (Sunnyvale, CA)
    …power management methods, audio circuit design , high-speed signals, and analog design - Experience with microcontrollers, digital circuit design ... workload to ensure success against timeline constraints Skills: - 4+ years of experience with system-level electrical design including circuit design , system… more
    Fresh Consulting (06/03/25)
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  • Electronics Engineer III, Special Test Equipment

    Lockheed Martin (Sunnyvale, CA)
    …discipline, or equivalent experience /combined education\. Considered an emerging authority\. * Experience with analog or digital design \. * Experience ... and how it relates to current and data flow in electronics\. * Experience with network design and network protocols: TCP/IP, latency, UDP\. * Experience with… more
    Lockheed Martin (08/13/25)
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  • Senior Principal Analog Design Engineer

    Northrop Grumman (Los Angeles, CA)
    …Woodland Hills, CA **Preferred Qualifications:** + Experience with Printed Circuit Board design using Mentor Xpedition Designer and AMS + Experience with ... capture and layout in Mentor Xpedition, Cadence, and/or Altium Designer + Experience with circuit and sub-system...HyperLynx Signal and Power Integrity analyses + PSpice circuit design analyses + Experience Design more
    Northrop Grumman (06/28/25)
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  • ASIC Design Engineer - Design

    Cisco (San Jose, CA)
    experience with STA tools like PrimeTime/Tempus + Understanding of related digital design concepts (eg. clocking and async boundaries) + Experience ... ASIC Design Engineer - Design & Timing...(Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence) + Experience with Spyglass… more
    Cisco (08/15/25)
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  • Senior Hardware Development Engineer, NPD Hardware

    Amazon (Cupertino, CA)
    …Asian ODM and JDM partners, both in development and in manufacturing. You will have previous experience in high speed digital design as a design lead ... enterprise/carrier products is a must. The ideal candidate is a strong hardware board designer with Ethernet networking experience in the areas of terabit switch… more
    Amazon (08/14/25)
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  • Test System Design Engineer 4 (ATS Irvine)

    Astronics (Irvine, CA)
    …and sheet metal design + 7+ years of hands on engineering design experience **Computer Skills:** + LabVIEW, Test Stand, LabWindows CVI, C/C++, VisualBasic, ... and other special purpose electronic systems, including RF subsystems. + Extensive experience with electronic circuit design , circuit card layout, test systems… more
    Astronics (07/18/25)
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  • BIM Manager, Transportation Design

    TYLin (San Diego, CA)
    Designer , Civil 3D, AutoCAD, and MicroStation. + Proven experience developing and implementing CAD/BIM standards. + Demonstrable ability to train ... Information Modelling (BIM) workflows, utilizing cutting-edge software such as OpenRoads Designer , OpenRail Designer (ORD), Civil 3D, AutoCAD, and MicroStation.… more
    TYLin (06/17/25)
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  • Senior Physical Design Applications…

    Cadence Design Systems, Inc. (San Jose, CA)
    …a period of at least two years and have a minimum of three years of Physical Design work experience . This role is not open to new college grads or interns. ... you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for...how teams solve problems. We are seeking individuals with experience in Digital Synthesis, Place and Route… more
    Cadence Design Systems, Inc. (07/02/25)
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  • Analog Mixed-Signal Design Engineer

    Broadcom (San Jose, CA)
    …Engineering or Computer Engineering with 6+ years of high-speed analog mixed signal design in advanced CMOS nodes.** + ** Experience in designing low jitter, ... metrics such as power, jitter and timing budget.** + ** Experience in assessing design bugs and recommending...TSMC 7nm-5nm, ie understanding of power consumptions, area, estimated design and layout efforts for digital and… more
    Broadcom (07/11/25)
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