- Western Digital (Fremont, CA)
- …Disposition hold wafer according to SPEC or disposition criteria provided by Process Engineer . Also capable of dispositioning hold wafer with own judgement based on ... report, EDCSPC, SPC chart, Fabtime, etc. + Notify Process Engineer and Manufacturing team if there's any suspected excursion....the problem and minimize the impact. + Train wafer fab operators with new process or tool. + Lead… more
- Skyworks (Newbury Park, CA)
- …Style and organizational values. + Monitor tactical issues and metrics-MTTR, MTBF, Fab moves PM scheduling, and availability goals. + Weekly accounting and approval ... dispatch information accordingly. + Coordinate ERT events with Incident Commander, Safety Engineer , and production management as they occur. Ensure that all ERT… more
- Google (Fremont, CA)
- …understanding. Raxium is seeking a highly motivated and skilled Digital Design Engineer with expertise in SystemVerilog to join our innovative team developing ... and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering… more