- NVIDIA (Santa Clara, CA)
- …verification methodologies, such as UVM + Proficiency with static timing and formal verification tools + Excellent communication and leadership skills, with ... such as filters and analog calibration circuits + Ensure verification of digital designs using direct and random testing...Establish and maintain standard methodologies for mixed-signal design and verification What we need to see: + MS or… more
- Northrop Grumman (San Diego, CA)
- …integration testing with embedded processors and avionics systems + Participate in formal verification and validation activities + Synthesis, Place & Route, ... you will develop requirements, define HW/SW interfaces and determine verification approaches. You will establish integrated product development workflows, processes… more
- Amazon (San Diego, CA)
- …- Familiarity with UVM and Matlab - Ability to write assertions and exposure to Formal verification - Strong written and verbal skills Amazon is an equal ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...the correctness of your block . Work with the verification team and participate in System level verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Must have a deep te c hni c al knowledge and understanding of digital verification flows, including simulation, debug, coverage, formal , and Verification IP. ... the c ore te c hnology requirements in digital verification , leadership for defining and c oordinating disruptive te...Developing and leading pre/post-sales c ampaigns to grow digital verification software adoption in assigned global acc ount. +… more
- Google (Sunnyvale, CA)
- …and route, power/clock distribution, congestion analysis, timing closure, CDC analysis and formal verification on blocks, subsystems or fullchip. + Work with ... (QoR). + Experience in sign-off closure techniques, including SSTA, physical verification , EMIR, and low-power implementation (UPF/CPF). + Experience in integrating… more
- NVIDIA (Santa Clara, CA)
- …experience with various stages in the ASIC design flow including functional and formal verification , emulation, synthesis & timing analysis, power estimation and ... responsible for micro-architecture and design including RTL design, synthesis, functional verification , and timing analysis using groundbreaking CAD tools and using… more
- Transdev (Atwater, CA)
- …Experience with system engineering principles such as defining requirements and formal verification and validation methods + Test scripting ... Decompose system requirements and consequently design test plans and verification strategies that give Waymo the necessary evidence to...service + Improve the quality and coverage of the verification of a system + Build new processes that… more
- Broadcom (San Jose, CA)
- …development, constraints validation, timing analysis and closure. + Experience with formal verification , timing analysis and Eco implementation. + Experience ... placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). + Drive tools and methodologies to achieve desired PPA… more
- Northrop Grumman (Los Angeles, CA)
- …etc. + Generation of complex test benches in Modelsim or Questasim to support formal Verification . + Familiarity with the VxWorks RTOS, its architecture and ... Technology, Engineering or Mathematics) discipline with 12 years of digital verification engineering experience using industry standard simulation tools; 10 years… more
- Oracle (Sacramento, CA)
- …security services/features such as OCI, AWS, Azure, or GCP + Exposure to formal verification , compilers, or new language development for high-assurance systems. ... Methodologies such as Center for Internet Security, PCI, ISO and others. + Formal Methods & Programming Languages - advancing verification techniques or building… more