- Northrop Grumman (Los Angeles, CA)
- …in Test script development with HW interfaces + Experience performing formal requirements decomposition and/or verification **Basic Qualifications for a ... in Test script development with HW interfaces + Experience performing formal requirements decomposition and/or verification **Preferred Qualifications:** +… more
- Amazon (Cupertino, CA)
- …ASIC physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification . - Demonstrated level of expertise in PD ... job responsibilities Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes Drive… more
- Siemens (Fremont, CA)
- …Understanding of parallelism, multi-threading, and scalable system design Prior contributions to verification tools or formal methods frameworks Why us? Working ... the SystemVerilog constraint solver - a core engine in our industry-leading verification platform. This is a highly technical role ideal for someone passionate… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC)...traditional simulation, you will be using other approaches like Formal and Emulation to achieve a bug-free design. The… more
- Qualcomm (Santa Clara, CA)
- …in leading a small team of Verification engineers performing CPU Verification . + Advance techniques such as: Formal , Assertions, and Silicon bringup, ... Group > CPU Engineering **General Summary:** As a Design Verification Engineer, you will work with Chip Architects to...work on a selected part of the CPU Design Verification to ensure that it functions to the standards… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with desire ... What you'll be doing: + Responsible for ASIC design verification for various processing blocks in a SOC. Work...VCS or Cadence Xcelium Simulator, Verdi, JasperGold or VC Formal + BS or MS degree in Computer Engineering… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer, you will plan, design, optimize, verify, and test electronic ... systems, validate digital/analog designs and develop a comprehensive validation/ verification testbench environment for projects that launch cutting-edge, world class… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Siemens (Anaheim, CA)
- …(MS preferred) and 10+ years of experience in EDA or IC Functional Verification .. Hands-on expertise in Digital Simulation, Coverage, Formal Techniques, CDC, and ... board, and system design.Join Us as an Account Technology Manager - Design Verification Technologies (DVT)Are you a tech-savvy problem solver who thrives on building… more
- Umbra Lab (Santa Barbara, CA)
- …and release high-quality, well-organized system requirements documents, subsystem specifications, verification plans, and other formal documentation. + Support ... other characteristic protected by federal, state, or local law.** **Employment Eligibility Verification ** In compliance with federal laws, all hired persons will be… more