- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks Team ... in industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage metrics, profiling tools, X prop, etc.… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Amazon (San Diego, CA)
- …. Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- Google (Mountain View, CA)
- …JAX, TensorFlow, PyTorch or similar. + Experience or interest in hardware verification technologies, formal methods, theorem proving, and hardware testing ... design: hardware-software co-design for ML models, hardware generation and verification , RTL optimization, and system design. + Engage and...to set you up for success as a Research Engineer at Google DeepMind, we look for the following… more
- Amazon (Sunnyvale, CA)
- …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- Siemens (El Segundo, CA)
- … tools. Experience in constrained-random testing, assertions (PSL or SV), static formal verification methods, clock domain crossing verification , LINT ... complex world of chip, board, and system design.Key Responsibilities: As a Functional Verification Application Support Engineer , you are the first point of… more
- Amazon (Sunnyvale, CA)
- …block and Sub System level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and route, ... Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our...Graphics, Synopsys, or Others) to block design for synthesis, formal verification , floor planning, bus / pin… more
- Amazon (El Segundo, CA)
- …positive impact on a global scale. The System Integration & Test (I&T) engineer will engage with an experienced cross-disciplinary team to design, integrate, and ... test innovative space-based and terrestrial applications. The System I&T Engineer will work closely with colleagues throughout Kuiper Government Solutions (KGS)… more
- Northrop Grumman (Los Angeles, CA)
- …in Test script development with HW interfaces + Experience performing formal requirements decomposition and/or verification **Basic Qualifications for a ... in Test script development with HW interfaces + Experience performing formal requirements decomposition and/or verification **Preferred Qualifications:** +… more
- Northrop Grumman (Los Angeles, CA)
- …currently looking for an experienced **Principal or Senior Principal** level engineer in **Modeling and Simulations, Systems engineering or software engineering** ... themselves to verify their suitability for weapon systems requirements verification . Later tasks will vary between software-centric or analysis-centric. The… more