- Lockheed Martin (Palmdale, CA)
- …tomorrow with you\. **Who You Are:** You are a detail\-oriented and results\-driven engineer with a strong background in systems engineering and test planning\. You ... or closely\-related engineering discipline Experience with requirements definition, tracking and/or verification Must be a US Citizen, must have a minimum final… more
- Meta (Sunnyvale, CA)
- …NOC, Memory and Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD degree in Electrical ... learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development… more
- Meta (Sunnyvale, CA)
- …NOC, Memory and Peripheral Subsystems 13. Experience with Synthesis, Timing Closure and Formal Verification Methodology 14. Master's or PhD degree in Electrical ... and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3.… more
- Amazon (Cupertino, CA)
- …ASIC physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification . - Demonstrated level of expertise in PD ... of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring… more
- Broadcom (San Jose, CA)
- …+ Collaborate with physical design team on constraint generation, timing closure analysis, formal verification , low power checks using UPF/CPF flows and ECO ... before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural definition including micro-architecture… more
- Crane Aerospace & Electronics (Burbank, CA)
- …your career with Crane Aerospace & Electronics! **Job Summary:** The Test Engineer is responsible for safety, coordination, performance and documentation of Crane ... qualification requirements. + Create test plans and procedures for design verification and qualification testing that best demonstrates compliance to customer and… more
- NVIDIA (Santa Clara, CA)
- …a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving challenging problems ... in asynchronous digital design and verification in a highly multi-functional work environment then join...Deep understanding of static sign-off technologies CDC, RDC and Formal . + Proficiency in one or more scripting languages… more
- Hensel Phelps (Pleasanton, CA)
- …where innovation meets craftsmanship at the New Ukiah Courthouse project.** The Safety Engineer is a resource for supporting the safety manager and project team in ... the successful completion of a construction project. The safety engineer exercises judgment and discretion in making safety-related recommendations, implementing… more
- Elkay (Paso Robles, CA)
- Senior Design Engineer **_The Company_** Zurn Elkay Water Solutions Corporation is a thriving, values-driven company focused on doing the right things. We're a fast ... navigate** **here (http://www.myworkday.com/elkay/d/inst/13102!CK5mGhIKBggDEMenAhIICgYI1A0Q2AI~*nsH-3y\_ndUM~/cacheable-task/2998$46522.htmld)** **to apply internally.** The Senior Design Engineer will be involved with a variety of engineering… more
- Meta (Sunnyvale, CA)
- …Estimation at RTL and Gate Level and identify power reduction opportunities 4. Run Formal Verification checks between RTL and Gate level netlist and debug the ... and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical Synthesis using advanced… more