- Amazon (Cupertino, CA)
- …Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - ... around the world. We are seeking an experienced Design Verification Engineers to build the next generation of our...& Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience… more
- City and County of San Francisco (San Francisco, CA)
- …30-year-old Automatic Train Control System (ATCS) in the subway with a new Communications-Based Train Control (CBTC) system. The project also expands CBTC managed ... TCUP is designed to overcome challenges and set a new standard for urban transit infrastructure projects. With a...general direction of the Train Control Upgrade Project Lead Engineer , the Senior Signaling Engineer leads the… more
- SpaceX (Sunnyvale, CA)
- …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year Design … more
- Eliassen Group (San Diego, CA)
- **Senior Software Test Engineer ** **San Diego, CA** **Type:** Contract **Category:** Quality Assurance (QA) **Industry:** Life Sciences **Reference ID:** JN ... a leader in biotechnology, has an excellent opportunity for an Senior Software Test Engineer to work on a 6-month contract opportunity. Work will be a hybrid… more
- Northrop Grumman (Los Angeles, CA)
- …etc. + Generation of complex test benches in Modelsim or Questasim to support formal Verification . + Familiarity with the VxWorks RTOS, its architecture and ... the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join...an opening for a **Staff FPGA (DSP) Digital Design Engineer ** with an active clearance, to join our team… more
- Northrop Grumman (San Diego, CA)
- …integration testing with embedded processors and avionics systems + Participate in formal verification and validation activities + Synthesis, Place & Route, ... the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join...Systems** has an opening for a **Sr. Principal** **Firmware** ** Engineer ** to join our team of qualified, diverse individuals… more
- Northrop Grumman (Los Angeles, CA)
- …Experience in Test script development with HW interfaces + Experience performing formal requirements decomposition and/or verification + Works under only general ... the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join...Grumman Mission Systems is searching for a **Sr. Principal Engineer Embedded Software** to support our Software and Test… more
- NVIDIA (Santa Clara, CA)
- …Strong proficiency in micro-architecture and RTL development using Verilog. + Experience with formal verification using JasperGold is a plus. + Deep expertise in ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over...a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only… more
- Amazon (Cupertino, CA)
- …tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) develop flows for synthesis, formal verification , floor planning, bus / pin planning, place and ... rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while… more
- General Atomics (San Diego, CA)
- …an exciting opportunity in our Systems Engineering group for a Project Engineer to lead engineering and development of cutting-edge solid-state laser High Energy ... directly supports EMS business units in the development of innovative new designs in resolving advanced technical engineering problems. This position reports… more