• Principal / Senior Principal Digital Verification…

    Northrop Grumman (Linthicum Heights, MD)
    …computing systems. You will be part of a team alongside a broad array of scientists and engineers working to make these processing solutions a reality. ... + Experience with Mentor Graphics and/or Cadence Verification tools - FPGA /ASIC Design experience Northrop Grumman provides a comprehensive benefits package and… more
    Northrop Grumman (04/30/25)
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  • Embedded Software Engineers

    Artera Technologies (Annapolis Junction, MD)
    …+ Experience in one (1) or more of the following areas: + Field Programmable Gate Array ( FPGA ) development + Application of in-circuit emulation + Background ... Debug Mode (BDM) or Joint Test Action Group (JTAG) (IEEE 1149.1) interfaces + Testing of embedded systems General Qualifications: + Embedded Software Engineer Level 1 requires a bachelor's degree in Computer Science or related discipline, and 0-1 years of… more
    Artera Technologies (04/29/25)
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  • Computer Engineering Intern

    Amentum (Severn, MD)
    …+ Assist in the development of embedded software for discrete and FPGA -based microcontrollers (STM32, Microblaze, MSP430, etc). + Assist in the development of ... RTOS or Embedded Linux application software. * Assist in the development of printed circuit boards (PCBs) including part selection and schematic capture. + Assist in the transition to manufacturing. + Assist in the test and evaluation of electronic circuits,… more
    Amentum (04/25/25)
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  • Principal RF Test Development Engineer - 2nd shift

    Northrop Grumman (Baltimore, MD)
    …discipline + Ability to work with minimal direction and guidance + Experience with FPGA + Experience with LabWindows CVI, C / C++ programming + TestStand programming ... + Proficiency with digital, analog, RF test equipment, RF theory and high speed digital. + Familiarity with differential digital interfaces like LVDS + PXI/PXIe and VME bus experience + Hands-on troubleshooting of electrical hardware RFTBWI MANUMS Salary… more
    Northrop Grumman (04/24/25)
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  • Cyber Security Subject Matter Expert IV - Csia

    Amentum (Aberdeen, MD)
    …VHSIC Hardware Development Language (VHDL) targeted for a variety of Field Programmable Gate - Array ( FPGA ) families and vendors, including Xilinx, Altera, and ... Microsemi. + Experience with the Army CIO/G6 programmatic requirement. + Must have an Active TOP SECRET US Government Clearance. Note: US Citizenship is required to obtain a TOP SECRET Clearance. **Preferred Qualifications:** + Demonstrated ability in… more
    Amentum (04/19/25)
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  • Vulnerability Researcher

    ARSIEM (Fort Meade, MD)
    …software stack and points of entry to the hardware (eg, not interested in FPGA reverse engineering, or other circuit reverse engineering). + Candidates who can merge ... low-level knowledge about the compilation of C/C++ code with a nuanced understanding of system design to identify and exploit common vulnerability patterns. Candidates should be comfortable with, at a minimum, user-mode stack-based buffer overflows, and… more
    ARSIEM (04/16/25)
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  • Embedded Software Engineer

    Leidos (Linthicum, MD)
    …TS/SCI with Polygraph required. + Specific tasks include: Hardware and Field Programmable Gate Array ( FPGA ) Design and Development; Embedded Software ... Development; Integration and Testing of Crypto Core Products; Test System Design and Development; Information Assurance Security Documentation, Evaluation and Certification; and Mentor Graphics tool suite configuration, tech support and maintenance. Primary… more
    Leidos (04/16/25)
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  • Senior Principal Digital Design Engineer

    Leonardo DRS, Inc. (Frederick, MD)
    …around the world. **Job Summary** **Job Responsibilities** + Involved in FPGA Design, System Simulation, Synthesis, Resource and Power Utilization analysis, Place ... and Route, Timing analysis, Verification, and Integration activities. Generate and execute constraint driven synthesis and timing closure techniques. + May also be involved with design, build, and test of cutting-edge devices containing both digital and… more
    Leonardo DRS, Inc. (04/11/25)
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  • Staff Custom Hardware SEIT Lead

    Northrop Grumman (Annapolis Junction, MD)
    …clocking (ie master oscillators not time of day clock). + Knowledge of FPGA and/or ASIC development and implementation. + Knowledge of Systems Engineering processing ... from generation of an Integrated Master Plan (IMP) to Work Product Breakdown into Integrated Master Schedules (IMS) for the development of complex systems of systems. + Risk Management experience. \#MDASEIT \#NGMCENG Salary Range: $163,200.00 - $244,800.00 The… more
    Northrop Grumman (04/08/25)
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  • Subsystems Engineering & Photonics Section Leader

    RTX Corporation (Hanover, MD)
    …Electromagnetic simulation including antenna design and analysis + Electronic scanned array design, analysis, integration and calibration + RF subsystem cascade ... design using tools such asSiemens Software Xpedition + Firmware development using FPGA development kits + RF photonics design, development and integration including… more
    RTX Corporation (04/03/25)
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