- Amazon (Cupertino, CA)
- Description In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we do is ... while also being deeply important to our customers. We design and build every component of our hardware and...use for accelerated computing through Machine Learning acceleration and FPGA acceleration. If you are interested in "building a… more
- Amazon (Sunnyvale, CA)
- …contribute to a groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and systems teams to ... UVM verification simulation solutions. The FPGA verification engineer will work with FPGA design and systems teams to define and create UVM based… more
- Silvus Technologies (Irvine, CA)
- …creates a pathway to a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior ... aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer ...* RTL coding, simulation, and test bench development. * FPGA synthesis and timing closure. * Hardware verification… more
- Amazon (Sunnyvale, CA)
- …for ASIC and system prototyping. You will participate in the design , verification and bring-up of IPs in FPGA by writing relevant scripts, debugging ... robot. What will you help us create? As an FPGA Engineer , you will be part of...in EE, CE, or CS * 5+ years of FPGA design or FPGA -based ASIC… more
- Silvus Technologies (Los Angeles, CA)
- …pathway to a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA ... research and development process from concept to field deployment. FPGA Design Engineers are responsible for the...+ RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification… more
- SpaceX (Irvine, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC/ FPGA Design Engineer /Level I: $120,000.00 - $145,000.00/per year ASIC/ ... in all phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification )...FPGA Design Engineer /Level II: $140,000.00 - $170,000.00/per year… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... degree in Electrical Engineering with 5+ years of experience + Experience with FPGA design and verification using Verilog + Experience with high end… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... degree in Electrical Engineering with 5+ years of experience + Experience with FPGA design and verification using Verilog + Experience with high end… more
- SpaceX (Hawthorne, CA)
- …we're looking for versatile, driven, and collaborative engineers. As an FPGA engineer on the satellite digital design team, you will be designing, ... FPGA Engineer (Starshield) Hawthorne, CA Apply...complex digital designs + Experience in different stages of FPGA development: RTL design , verification ,… more
- NVIDIA (Santa Clara, CA)
- …SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. ... + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it...and testing infrastructure and verify the correctness of the design . + Good coordination with architects, designers, verification… more