- Amazon (Sunnyvale, CA)
- …contribute to a groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and systems teams to ... UVM verification simulation solutions. The FPGA verification engineer will work with FPGA design and systems teams to define and create UVM based… more
- Leidos (San Diego, CA)
- …and verification of the final products. **Primary Responsibilities** The FPGA /Firmware design engineer 's primary job functions include designing, ... Division - Space Sensing & Security engineering development team. As a **Senior** **Firmware/ FPGA Design Engineer ** in Leidos, you will be an integral part… more
- Silvus Technologies (Irvine, CA)
- …creates a pathway to a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior ... aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer ...* RTL coding, simulation, and test bench development. * FPGA synthesis and timing closure. * Hardware verification… more
- Silvus Technologies (Los Angeles, CA)
- …pathway to a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA ... research and development process from concept to field deployment. FPGA Design Engineers are responsible for the...+ RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification… more
- SpaceX (Irvine, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC/ FPGA Design Engineer /Level I: $120,000.00 - $145,000.00/per year ASIC/ ... in all phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification )...FPGA Design Engineer /Level II: $140,000.00 - $170,000.00/per year… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... degree in Electrical Engineering with 5+ years of experience + Experience with FPGA design and verification using Verilog + Experience with high end… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... degree in Electrical Engineering with 5+ years of experience + Experience with FPGA design and verification using Verilog + Experience with high end… more
- Amazon (El Segundo, CA)
- …program that continues to push the state of the art in distributed systems and hardware design . As an FPGA engineer on the Kuiper Government Solutions team ... shipping to customers - 3+ year of experience with modern ASIC / FPGA design and verification tools Preferred Qualifications - Master's Degree in Physics,… more
- SpaceX (Hawthorne, CA)
- …we're looking for versatile, driven, and collaborative engineers. As an FPGA engineer on the satellite digital design team, you will be designing, ... FPGA Engineer (Starshield) Hawthorne, CA Apply...complex digital designs + Experience in different stages of FPGA development: RTL design , verification ,… more
- SpaceX (Hawthorne, CA)
- …looking for versatile, driven, and collaborative engineers. As a Sr. FPGA engineer on the satellite digital design team, you will be designing, developing, ... Sr. FPGA Engineer (Starshield) Hawthorne, CA Apply...complex digital designs + Experience in different stages of FPGA development: RTL design , verification ,… more
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