- US Tech Solutions (Goleta, CA)
- …independently and take ownership of verification deliverables within a UVM /SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the... prior to tape-out. **Responsibilities:** + Perform pre-silicon functional verification of digital designs using UVM and… more
- The Boeing Company (El Segundo, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Verification Engineer on the Boeing Electronic Products team ... units designed at other sites. **Position Responsibilities:** + Design and implement an ASIC/ FPGA verification environment utilizing UVM & System Verilog. +… more
- The Boeing Company (Mountain View, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Engineer on the Boeing Electronic Products team you will develop ... Intelligence & Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior) to… more
- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117193BR** EEO ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan,...SystemVerilog/ UVM , OVM, and/or VHDL + Experience with FPGA /ASIC design and verification tools (Mentor Questa… more
- Cisco (Milpitas, CA)
- …data centers with a fully unified routing and switching portfolio. **Your Impact** The FPGA Engineer will get to work with cutting edge, next generation routers ... or relevant degree and 3+ years of related experience. *Experience with UVM and/or VMM Verification methodology. *Experience with high-speed design debug.… more
- GE Aerospace (San Ramon, CA)
- …sustainable flight and believe in our talented people to make it happen. The Senior FPGA Design Engineer will play a critical role in designing, developing, and ... into cutting-edge aerospace products. Your expertise in digital design, verification , and FPGA /ASIC development will contribute to...Libero and Xillinx Vivado. + Experience in VHDL and UVM Test Benches. + Experience with the Mentor Graphics… more
- Amazon (Sunnyvale, CA)
- …UVM , assertions and coverage driven verification . Experience using multiple verification platforms: UVM test bench, FPGA , emulator, software ... of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on...with design engineers and architects Create and enhance constrained-random verification environments using SystemVerilog and UVM Write… more
- Tarana Wireless (Milpitas, CA)
- …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification...+ BSEE required/MSEE preferred + 5-12 years of related Verification experience + Strong knowledge of UVM … more
- Microsoft Corporation (San Jose, CA)
- …testing, and deploying networking acceleration on Azure, and the largest deployment of Field-Programmable Gate Array ( FPGA ) SmartNICs (Azure Boost) ... millions of people across the planet. As a Senior Verification Engineer in the Accelnet Hardware team,...field AND 5+ years technical engineering experience with Universal Verification Methodology ( UVM ), System Verilog and … more
- Microsoft Corporation (San Diego, CA)
- …across Microsoft cloud hardware. We are seeking a motivated **Senior** ** Verification Engineer ** who is enthusiatic about cutting-edge hardware acceleration ... years technical engineering experience + OR equivalent experience. + 4+ years of verification experience. + 3 years of developing UVM -based testbenches or… more
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