- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as a **ASIC/ FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... are seeking a highly talented and motivated **ASIC & FPGA Verification Engineer ** who has...ASIC/ FPGA verification experience with modern verification methodologies such as UVM , OVM or… more
- BAE Systems (Westminster, CO)
- …Other incentives may be available based on position level and/or job specifics. **Principal FPGA Verification Engineer - $15K Sign On Bonus** **114981BR** ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...regressions/testlists. + Be responsible for generating and executing the FPGA Verification Test Plan and FPGA… more
- Lockheed Martin (Highlands Ranch, CO)
- **Description:** Join Our Team as a **ASIC/ FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... Space's Silicon Solutions team and seeking a future\-looking Principal Verification Engineer who is able to case...of FPGA and ASIC devices utilizing modern verification methodologies such as UVM \. * Experience… more
- BAE Systems (Westminster, CO)
- …development environment to provide continuously evolving capabilities in space payloads. As an FPGA Verification engineer , you will work with a team ... including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. + Experience with OVM/ UVM Verification methodologies. + Ability to work...based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K… more
- Lockheed Martin (Denver, CO)
- …Citizen** \. **Desired Skills:** * Experience in modern ASIC/ FPGA /SoC verification strategies as appropriate, including UVM /SystemVerilog, emulation, formal ... **Description:** Join Our Team as an **ASIC/ FPGA Principal SoC Engineer ** where you...system cost and schedule\. * Partner with a Principal Verification Engineer to architect cohesive approaches to… more
- BAE Systems (Westminster, CO)
- …technical leadership skills in FPGA design. + Experience with OVM/ UVM Verification methodologies. + Experience developing specifications, cost, schedule, and ... be available based on position level and/or job specifics. **Principal Senior Engineer - FPGA Design - $10K Sign On Bonus** **113105BR** EEO Career Site Equal… more
- BAE Systems (Westminster, CO)
- …digital electronics, FPGAs, and embedded processor systems. + Experience with OVM/ UVM Verification methodologies. + Experience developing specifications, cost, ... may be available based on position level and/or job specifics. ** FPGA Design Engineer II** **111253BR** EEO Career Site Equal Opportunity Employer. Minorities .… more
- ColdQuanta (Louisville, CO)
- …with Git, CI/CD pipelines using Vivado (simulation, synthesis, bitstream generation), and verification frameworks like UVM or CocoTB. + Maintain documentation of ... POSITION SUMMARY We are seeking a Senior Embedded Systems Engineer with deep expertise in hardware-level design and embedded...you will lead the design, development, and deployment of FPGA and embedded software solutions that are central to… more