• Senior Principal Design Verification

    BAE Systems (Austin, TX)
    …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **114362BR** EEO ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan,...SystemVerilog/ UVM , OVM, and/or VHDL + Experience with FPGA /ASIC design and verification tools (Mentor Questa… more
    BAE Systems (09/09/25)
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  • FPGA Design Engineer Lead

    Lockheed Martin (Grand Prairie, TX)
    … Engineering Lead to join our team\. As an ideal candidate, you're an experienced FPGA engineer with a strong background in FPGA architecture design, ... Microchip \(MicroSemi\)and Libero SoC Design toolsets \- Familiarity with FPGA Vivado/Vitis toolsets \- Experience with UVM ... FPGA validation \- Experience in ASIC / FPGA life cycle \(architecture, design, simulation, verification ,… more
    Lockheed Martin (07/18/25)
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  • Design Engineer ASIC & FPGA -Level 5

    Lockheed Martin (Fort Worth, TX)
    …Works IRADs\. With the teams unique expertise in System Verilog and the Universal Verification Methodology \( UVM \) in verifying FPGA \-based designs on Linux, ... are** _Lockheed Martin_ You will be a ASIC & FPGA Design Engineer on the Microelectronics Development...Secret security clearance **Desired Skills:** * Experience with modern verification methodologies such as UVM , OVM or… more
    Lockheed Martin (09/18/25)
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  • FPGA Development Engineer

    Amazon (Austin, TX)
    …and software solutions used in AWS data centers globally. We're looking for a FPGA development engineer with a focus on building accelerator services. As a ... FPGA Development Engineer , you will be responsible...years of experiences in testbench development and debugging using SystemVerilog/ UVM - Experience of FPGA development tools… more
    Amazon (07/11/25)
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  • ASIC Verification Engineer

    Amazon (Austin, TX)
    …in areas of image processing. - Familiarity with Matlab - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - Strong ... silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a...TCL) - 5+ years experience in System Verilog or UVM Preferred Qualifications - Master's or PH.D in Computer… more
    Amazon (09/10/25)
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  • ASIC Design Verification Engineer

    Amazon (Austin, TX)
    …our customers use for accelerated computing through Machine Learning acceleration and FPGA acceleration. If you are interested in "building a complete product" from ... May 2023 and December 2025 Programming experience in System Verilog or UVM Preferred Qualifications Master's or PhD in Electrical Engineering or Computer Engineering… more
    Amazon (09/16/25)
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  • Digital Design Engineer

    Meta (Austin, TX)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
    Meta (08/11/25)
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