- Cadence Design Systems, Inc. (San Jose, CA)
- …and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties (FPGA IPs) for Protium platform, including design, ... + Experience in debugging FPGAs in the lab using Vivado hardware manager , debugging with firmware/software + Experience using Linux servers, Script development using… more
- Revelyst (Irvine, CA)
- …consolidations, variance reporting and SG&A management. This position reports to the Manager , Financial Planning & Analysis, Adventure Sports, and is based out of ... CamelBak and QuietKat. Identify trends, risks and opportunities through each milestone gate and present out to the executive team. + Performance Metrics: Report… more