• Senior ASIC Design Verification…

    Cisco (San Jose, CA)
    …vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team comprises micro-architects, front-end designers, ... to close on 4/30/2025 Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and ...participate in the journey from sample arrival through system validation to first customer shipments. What You'll Do *… more
    Cisco (03/05/25)
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  • CPU Physical Design Timing Engineer

    Qualcomm (Folsom, CA)
    …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... domain designs of Oryon CPU Cores. + Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus....out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.… more
    Qualcomm (03/04/25)
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  • Physical Design Engineer , Static…

    Google (Sunnyvale, CA)
    …analysis and timing ECO creation, timing margins). + Experience with Electronic Design Automation (EDA) tools (ie, Primetime, Tempus, Timevision, STAR-RC) and EDA ... + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful...role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive… more
    Google (04/23/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...opportunities to partner and collaborate with full stack software, hardware , ASIC Design , Emulation and Post-Silicon teams… more
    Meta (05/06/25)
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  • ASIC Engineer , Design Verification

    Meta (Sacramento, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...opportunities to partner and collaborate with full stack software, hardware , ASIC Design , Emulation and Post-Silicon teams… more
    Meta (04/18/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...opportunities to partner and collaborate with full stack software, hardware , ASIC Design , Emulation and Post-Silicon teams… more
    Meta (03/19/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...opportunities to partner and collaborate with full stack software, hardware , ASIC Design , Emulation and Post-Silicon teams… more
    Meta (03/08/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part ... also provides ample opportunities to partner and collaborate with full stack software, hardware , ASIC Design , Emulation and Post-Silicon teams towards creating a… more
    Meta (02/12/25)
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  • Digital ASIC Design Engineer…

    Qualcomm (San Diego, CA)
    …(lint checking, CDC, DFT, synthesis, FV, STA, etc.) - Develop detailed digital hardware design specification documents and verification plans - Work with ... Science, Engineering, or related field and 4+ years of ASIC design , verification, validation , integration, or related work experience. OR Master's degree in… more
    Qualcomm (04/19/25)
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  • ASIC Design Engineer - Design…

    Cisco (San Jose, CA)
    …heart of silicon development at Cisco, you'll engage in every facet of chip design , from architecture to validation , using the latest silicon technologies to ... and storage into a single system. With tightly integrated hardware and software solutions, you'll gain exposure to all...of what's possible! Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and… more
    Cisco (04/19/25)
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