• Principal Design Engineer Manager - AI…

    Microsoft Corporation (Mountain View, CA)
    Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for ... to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high...paramount importance. To achieve this goal, the AI Silicon Engineering (AISiE) team is instrumental in defining and delivering… more
    Microsoft Corporation (09/26/25)
    - Related Jobs
  • Technical Lead Manager , ASIC Design,…

    Google (Sunnyvale, CA)
    Technical Lead Manager , ASIC Design, Machine Learning + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** ... a friend **Minimum qualifications:** + Bachelor's degree in Electrical Engineering , Computer Engineering , Computer Science, or a...role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive… more
    Google (09/29/25)
    - Related Jobs
  • Principal Silicon IP Program Manager

    Microsoft Corporation (Mountain View, CA)
    Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for ... to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high...To achieve this goal, the Compute Silicon Manufacturing and Engineering (CSME) team is instrumental in defining and delivering… more
    Microsoft Corporation (09/27/25)
    - Related Jobs
  • Technical Program Manager , ASIC

    Amazon (San Diego, CA)
    …connectivity. The Project Kuiper team is looking for a Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of ... Reliability, Qual, and NPI. The role will interface with cross-functional engineering and program/product management teams to develop ASIC/SOCs solutions that will… more
    Amazon (09/21/25)
    - Related Jobs
  • ASIC Design Technical Leader - Design & Timing…

    Cisco (San Jose, CA)
    …+ Location:San Jose, California, US + Area of InterestEngineer - Hardware + Compensation Range168800 USD - 241200 USD + Job TypeProfessional ... timing modes. + Option to also do block level RTL design or block or top-level IP integration. +...**Minimum Qualifications:** + Bachelor's Degree in Electrical or Computer Engineering with 8+ years of ASIC or related experience… more
    Cisco (09/24/25)
    - Related Jobs