- Power Integrations (San Jose, CA)
- As a Senior Staff IC Design Engineer, you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital ... switching power supply: + Simulation with Cadence tools. + Layout supervision and verification. + Preparation of test plan....with emphasis on analog and/or digital Integrated Circuit ( IC ) design + Hands-on experience with analog /… more
- Insight Global (Milpitas, CA)
- …analog and mixed-signal semiconductor solutions is looking for a Senior or Principal IC Design Engineer to join their advanced connectivity team. This group develops ... a hands-on technical role requiring strong circuit-level design experience and full IC tapeout ownership. Key Responsibilities: Design and tapeout BiCMOS ICs for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a...requires proficiency in using CAD tools for circuit simulation, layout , and physical verification + Cadence tool experience, lab… more
- Actalent (San Jose, CA)
- IC Package Design Engineer - Flip-Chip BGA / High-Speed ASICs Our client, a global leader in advanced semiconductor technologies, is seeking an experienced IC ... design efficiency improvements and automation initiatives + Utilize Cadence APD for layout and design validation Required Skills + Proven experience with flip-chip… more
- Skyworks (Irvine, CA)
- RF IC Design Co-Op (Jan '26 - June '26) Apply now " Date:Aug 21, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting ... development activities, while strengthening your practical skills in circuit design, simulation, layout , and lab testing. This internship is ideal for students with… more
- Skyworks (Irvine, CA)
- RF IC Design Co-Op (Jan '26 - June '26)...with Cadence Virtuoso, ADS, SPICE is highly preferred . Layout Experience with Cadence Virtuoso is highly preferred . ... EM Simulation Experience with EMX or HFSS is highly preferred . Hands-on experience in the lab using a network analyzer and other RF instruments is highly preferred #LI-DJ1 The typical pay range for an Engineering intern across the US is currently USD $26.00 -… more
- Broadcom (San Jose, CA)
- …process nodes. This individual will be hands-on, heavily involved in day-to-day design/ layout issues and in addition, interact with EDA vendors, the PDK development ... Unix Shell scripting + Create documentation and provide hands-on training for design and layout engineers + Work with EDA vendors to track and resolve issues + Work… more
- Broadcom (San Jose, CA)
- …integration. + Creation of documentation and hands-on training for AMS Design & Layout engineers as needed. + Tracking and resolution of tool and technology file ... + User level familiarity with related CAD Tools: Calibre, Virtuoso Layout & Schematics, Quantus QRC/StarRC/QuickCap/Raphael, and simulation using SPECTRE/HSPICE. +… more
- Broadcom (Irvine, CA)
- …a motivated and technically strong engineer to join our team. Job Description: Layout design of digital high-performance blocks Timing closure of the blocks with ... implications of different cell architectures Collaborate with design and layout engineers to optimize layout for area...with design and layout engineers to optimize layout for area and performance Work with CAD, packaging… more
- Broadcom (San Jose, CA)
- …Lines, Encoders/Decoders, PRBS GEN / Check, Clock Spines, PHYs 2. Interface with other Layout , RTL, SI etc engineers to implement & integrate the developed IP 3. ... Ability to complete chip bring-up and lab measurement of designed elements 4. Ability to understand the analog or IP blocks used in the PHY at a functional level and verify. Job Requirements: 1. Excellent knowledge of Digital design is a must and it will be a… more