• Cloud & Microsoft Technologies Managed Services…

    NTT America, Inc. (Sacramento, CA)
    …grow, belong and thrive. **Your day at NTT DATA** As a Cloud Managed Services Engineer (L3) at NTT DATA, you'll play a key role in providing top-tier managed ... and artificial intelligence, industry solutions, as well as the development, implementation and management of applications, infrastructure, and connectivity. We are… more
    NTT America, Inc. (09/12/25)
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  • BESS Commercial Engineer

    Lightsource bp (San Francisco, CA)
    …seeking a technically strong and commercially minded Hybrid PV BESS Commercial Engineer to support utility scale photovoltaic (PV) + Battery Energy Storage System ... procurement, cost estimation, vendor evaluation, stakeholder negotiations and project implementation . Deep familiarity with PV plant design and performance modeling… more
    Lightsource bp (09/12/25)
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  • Senior Backend Compiler Engineer

    NVIDIA (Santa Clara, CA)
    We are searching for a Senior Backend Compiler Engineer with experience in LLVM code generation for an exciting and fun role in our GPU Software organization. Our ... "the AI computing company". What you will be doing: + Guide the design and implementation of a new LLVM based backend JIT compiler targeting NVIDIA GPUs + Design and… more
    NVIDIA (09/11/25)
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  • Tech Lead/Senior Software Engineer

    US Bank (Cupertino, CA)
    …at-all from Day One. **Job Description** US Bank is seeking a Senior Software Engineer and Tech Lead to drive the technical vision, architecture, and execution of ... optimize user behavior. **Key Responsibilities** + Lead the design and implementation of scalable, high-performance solutions leveraging Quantum Metric and related… more
    US Bank (09/11/25)
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  • Intelligent Transportation System (ITS) Designer…

    TYLin (San Diego, CA)
    …City Solutions is looking for a dynamic Intelligent Transportation Systems (ITS) Design Engineer to help shape the future of mobility. In this role, you'll design ... + Apply knowledge across the ITS/ATMS lifecycle-from planning and design to implementation and operations. + Stay current on emerging technologies and assess… more
    TYLin (09/11/25)
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  • Principal Engineer , VLSI Design…

    SanDisk (Milpitas, CA)
    …you'll be at the center of innovation. We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory Design team. This is a great ... chip level integration, chip lead, and full product life cycle (requirements, design, implementation , test) of Logic design + Working knowledge of the entire Logic… more
    SanDisk (09/11/25)
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  • Staff Engineer , VLSI Design…

    SanDisk (Milpitas, CA)
    …you'll be at the center of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory Design team. This is a great ... chip level integration, chip lead, and full product life cycle (requirements, design, implementation , test) of Logic design + Working knowledge of the entire Logic… more
    SanDisk (09/10/25)
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  • Senior Logic Design Engineer - Physical…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the design of ... last-level caches , working closely with the physical design team on implementation , synthesis and timing closure as well as working on micro-architectural… more
    NVIDIA (09/10/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve timing convergence flows working… more
    NVIDIA (09/10/25)
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  • Physical Design Engineer (Einfochips Inc)

    Arrow Electronics (San Jose, CA)
    **Position:** Physical Design Engineer (Einfochips Inc) **Job Description:** **What candidate will Be Doing:** + Netlist to-GDSII implementation , including ... top-level floorplanning,, Design partitioning, Top level block to block/over the block routing, repeater flops and balance flop concepts, Top level Clock structure planning, Clock network SPICE simulation, power mesh planning, and full signoff (DRC, LVS, STA,… more
    Arrow Electronics (09/10/25)
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