• Aegis SI&T Command and Control (C2)…

    General Dynamics Information Technology (San Diego, CA)
    …is safe and tomorrow is smarter. Our work depends on a **Ship Integration & Test (SI&T) Command and Control (C2) Engineer ** joining our team to support the ... **Req ID:** RQ199146 **Type of Requisition:** Regular **Clearance Level Must Be Able to Obtain:** Secret **Public...that is geographically dispersed to provide engineering planning, design, integration , installation, and test of Aegis Combat… more
    General Dynamics Information Technology (05/06/25)
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  • Senior Mechanical Engineer (Open…

    Sacramento Municipal Utility District (Sacramento, CA)
    Title: Senior Mechanical Engineer (Open until filled) Department: Power Generation Location: Sacramento, CA, US, 95827-3824 Category: Engineering/Technical **Minimum ... Generation Engineering Department. SMUD is seeking a knowledgeable Senior Mechanical Engineer experienced in power generation, with strong project management skills.… more
    Sacramento Municipal Utility District (03/27/25)
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  • Principal Design Engineer , Storage System…

    Celestica (CA)
    …+ Prior participation in industry groups and associations is strongly desired. + System level integration , interoperability and test experience is desired. + ... SCSI, NVMe, SAS and PCIe protocol. Experience on rack level integration design will be a plus....System level manufacturing test experience is desired. + The successful candidate will… more
    Celestica (05/07/25)
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  • Systems Safety Engineer , Hardware Safety…

    Amazon (Sunnyvale, CA)
    …in system- level design, sustaining, or validation including circuit design, integration , failure analysis and debug. - 1-2 years of experience with off-shore ... in system- level design, sustaining, or validation including circuit design, integration , and debug - Strong interpersonal and documentation skills with diverse… more
    Amazon (04/18/25)
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  • JAVA Software Engineer

    BAE Systems (San Diego, CA)
    …non-monetary recognition awards. Other incentives may be available based on position level and/or job specifics. **JAVA Software Engineer ** **110433BR** EEO ... **Job Description** **Software Engineer ** The Software Engineer will perform...testing leveraging DEVOPS automation and, where appropriate, use of test automation commercial tools. There are a range of… more
    BAE Systems (02/20/25)
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  • Hardware Systems Engineer , NPI AI

    Meta (Menlo Park, CA)
    …network ASIC architecture, AI workloads/ML models to design and implement robust system- level test plans, including functional, stress, and performance tests. 4. ... **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP)...with production system use cases, creating and automating corresponding test cases. 5. Design experiments and develop tools to… more
    Meta (04/24/25)
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  • Sr Principal ROIC Semiconductor Yield…

    RTX Corporation (Goleta, CA)
    …Experience working in a semiconductor fab processing CMOS imaging sensor ROIC's as a process engineer , process integration engineer , or yield engineer + ... an opportunity for a Sr Principal Semiconductor Yield Process Engineer to join a small team of senior- level...improvement, working collaboratively with the ROIC foundries, IC Design, Test and System Engineering to improve ROIC yield as… more
    RTX Corporation (04/03/25)
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  • Senior Software Engineer , Project Starline

    Google (Mountain View, CA)
    …structures/algorithms. + Experience in one or more of the following: test automation, refactoring code, test -driven development, build infrastructure, optimizing ... related technical field. + Experience driving software and hardware integration for complex commercial electronic systems from research/concept through production.… more
    Google (04/10/25)
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  • Hardware Systems Engineer , AI NPI

    Meta (Menlo Park, CA)
    …the new product introduction (NPI) phase. **Required Skills:** Hardware Systems Engineer , AI NPI Responsibilities: 1. Drive and execute end-to-end system validation ... 3. Explore new use cases with customer teams and identify related test methodologies/ test cases accordingly. 4. Investigate and troubleshoot complex failures… more
    Meta (05/07/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Responsibilities: 1. Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. 2. Develop ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking...verification closure of a design module or sub-system from test -planning, UVM based test bench development to… more
    Meta (05/06/25)
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