- J&J Family of Companies (Santa Clara, CA)
- …States of America **Job Description:** Johnson & Johnson is hiring for a **R&D Engineer II - Shockwave Medical** to join our team located in **Santa Clara, CA** ... the treatment of calcified plaque. **Position Overview** The R&D Engineer II will use technical skills in the development...policy and quality objectives + Responsible for ensuring that lab notebooks are documented in a timely manner and… more
- J&J Family of Companies (Santa Clara, CA)
- …States of America **Job Description:** Johnson & Johnson is hiring for a **Sr. R&D Engineer - Shockwave Medical** to join our team located in **Santa Clara, CA** . ... treatment of calcified plaque. **Position Overview** The Sr. R&D Engineer will use technical skills in the development of...policy and quality objectives + Responsible for ensuring the lab notebooks are documented in a timely manner and… more
- J&J Family of Companies (Santa Clara, CA)
- …of America **Job Description:** Johnson & Johnson is hiring for a **Sr R&D Engineer (Clinical Engineering) - Shockwave Medical** to join our team located in **Santa ... treatment of calcified plaque. **Position Overview** The Sr. R&D Engineer (Clinical Engineering) will use technical skills in the...policy and quality objectives + Responsible for ensuring that lab notebooks are documented in a timely manner and… more
- Texas Instruments (Santa Clara, CA)
- **Optical Packaging Engineer ** **Location: Dallas, TX or Santa Clara, CA** **Group: Kilby Labs** **We can't predict what the future holds, but we know Texas ... functions, work with an interdisciplinary team, and bridge from lab to fab to develop technologies to enable new...is seeking a highly motivated and experienced Optical Packaging Engineer to lead the development and implementation of innovative… more
- Insight Global (San Jose, CA)
- …server/computer/network industry Job does require design and lab work Experience with lab bring up and design validation Experience in Ethernet, high speed ... schematics Bring up hardware with ASIC teams Debug issues the lab using analyzers, scopes, and other lab debug tools We are a company committed to creating… more
- Lockheed Martin (Palmdale, CA)
- **Description:** The Cyber Systems Security Engineer Staff will be responsible for leading a team of fellow engineers in the designing, assembly, integration, and ... maintenance of System Integration Lab \(SIL\), particularly focusing on network planning, hardware installation, software integration support, verification, and … more
- Lockheed Martin (Palmdale, CA)
- …Your mission is ours\. **Key Responsibilities** : The Cyber Systems Security Engineer Sr will be responsible for designing, assembly, integration, and maintenance of ... System Integration Lab \(SIL\), particularly focusing on network planning, hardware installation, software integration support, verification, and validation of… more
- Leonardo DRS, Inc. (San Diego, CA)
- …protect with Light". Come join the family!_ **Job Summary** The Process Development Engineer at Daylight will be responsible for supporting the development of laser ... related equipment in manufacturing, and implement changes in the lab , and document those changes. They should additionally be...(Work Instructions, ECO's, and TDN's). + Create and conduct validation test plans to qualify process changes. + Execute… more
- Amazon (Sunnyvale, CA)
- …powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part ... with the extended team. You will participate in the lab bring-up of these blocks either in FPGA, emulation,...- Experience with formal verification - Experience with post-silicon validation - Experience with embedded software - Experience with… more
- Amazon (Sunnyvale, CA)
- Description As a Design Verification (DV) Engineer , you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. ... with the extended team. You will participate in the lab bring-up of these blocks either in an FPGA...- Experience with formal verification - Experience with post-silicon validation - Experience with embedded software - Experience with… more