• Staff Engineer, Electrical Design - Power

    Celestica (San Jose, CA)
    …California City: San Jose **Summary** The Staff Engineer, Electrical Design - Power develops new electrical systems/circuits for various applications/ ... reviews in areas such as manufacturing, test, supply chain, reliability, industrial design and simulations. **Detailed Description** Performs tasks such as, but not… more
    Celestica (07/23/25)
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  • Civil Design Engineer

    Parsons Corporation (Pasadena, CA)
    …or EIT Certified preferred. + Minimum 8+ years of experience in site layout , grading, drainage, and underground pipeline design . + Proficiency in AutoCAD, ... you're looking for. **Job Description:** Parsons Pasadena is seeking a skilled Senior Civil Design Engineer to join our Los Angeles team. You will work on water and… more
    Parsons Corporation (08/10/25)
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  • Senior Staff IC Design Engineer

    Power Integrations (San Jose, CA)
    As a Senior Staff IC Design Engineer, you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital ... circuitry. Specific responsibilities are: + Mixed-mode integrated circuit design for switching power supply: + Simulation with Cadence tools. + Layout more
    Power Integrations (08/09/25)
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  • Mechanical Design Engineer

    Curtiss-Wright Corporation (Brea, CA)
    **Mechanical Design Engineer **SIGN ON BONUS As a Engineer you will work with multiple teams within the Engineering Group to provide products to advanced power plant ... Inclusive & Supportive Culture (https://careers.curtisswright.com/en/who-we-are/) * **Your Challenge:** + Design parts and assemblies for various product lines (eg… more
    Curtiss-Wright Corporation (07/09/25)
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  • Design Engineering Director

    Cadence Design Systems, Inc. (San Jose, CA)
    …test, develop calibration / compliance lab suites and characterize. + Architect and design Printed circuit boards in Schematic and layout level. Familiarity with ... to make an impact on the world of technology. Design Engineering Director -HPP The role will be a...peripheral chips, high speed interface design techniques, Signal and Power integrity checks / analysis… more
    Cadence Design Systems, Inc. (07/09/25)
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  • R&D Engineer IC Design

    Broadcom (San Jose, CA)
    …3nm and beyond Job Responsibilities: In this position you are responsible for 1. Design , RTL coding, and IP integration of key components like Digital Delay Lines, ... / Check, Clock Spines, PHYs 2. Interface with other Layout , RTL, SI etc engineers to implement & integrate...and verify. Job Requirements: 1. Excellent knowledge of Digital design is a must and it will be a… more
    Broadcom (07/03/25)
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  • RF Design Co-Op (Jan '26 - June '26)

    Skyworks (Irvine, CA)
    RF Design Co-Op (Jan '26 - June '26) Apply now " Date:Aug 21, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting ... of experts Term: Winter/Spring Co-Op (Jan '26 - June '26) Responsibilities + Design RF/Analog circuit blocks using Cadence, EMX tools + Perform Lab evaluations of… more
    Skyworks (08/22/25)
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  • System Design Engineer

    NVIDIA (Santa Clara, CA)
    …work, to amplify human creativity and intelligence. We are now looking for a System Design Engineer in the Graphics Product Team. In this role, you will be working ... lead the debug efforts. + Create schematic, supervise PCB layout and system validation. + Handle documentation required to...for better performance, and lower cost. + Improve the design flow together with the infrastructure team. What We… more
    NVIDIA (07/05/25)
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  • Physical Design Engineer - Synthesis, PNR,…

    SanDisk (Milpitas, CA)
    …moving forward. **Job Description** We are looking for an experienced **Digital Physical Design Engineer** to work whole digital SPR flow from RTL to GDS, include ... + **DRC/LVS/Antenna verification** + Verify DRC/LVS/Antenna in PNR and Layout and fix violations. + **Team work and Communication:**...+ **Experience:** A minimum of 3 years in Physical design digital RTL to GDS flow. + **Education** :… more
    SanDisk (08/08/25)
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  • Research Scientist, Design and Simulation,…

    Amazon (San Francisco, CA)
    …of our customers. We are looking to hire a Research Scientist to design and model novel superconducting quantum devices, including qubits, readout and control ... Office, ANSYS, Keysight ADS, Cadence AWR, Palace, etc.) - Experience with device layout scripting and automation - Effective working in a team environment with other… more
    Amazon (08/23/25)
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