• Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This ... Help by defining circuit requirements and complete design from schematic, layout , and verification to characterization. + Conduct schematic design of deep-submicron… more
    NVIDIA (07/24/25)
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  • Senior Electrical Engineer

    Umbra Lab (Santa Barbara, CA)
    …never meaningfully existed before. We are in search of a Senior Electrical Engineer who possesses extensive experience in space systems, encompassing all aspects of ... + Perform electrical design, including schematic, parts selection and layout , for spacecraft electronics subsystems (eg avionics, solar arrays, batteries,… more
    Umbra Lab (07/22/25)
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  • MEMS Process Integration Engineer

    Fujifilm (Santa Clara, CA)
    …SUMMARY:** We are seeking a highly skilled and motivated **MEMS Process Integration Engineer ** to join our rapidly growing engineering team. In this critical role, ... integration from concept to finished product. + Familiarity with layout files (industry-standard such as GDS and OASIS) and...with MEMS design tools (eg, SolidWorks or AutoCAD, MEMS layout tools like dw-2000 or Tanner L-edit). + Experience… more
    Fujifilm (07/19/25)
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  • Principal Engineer of Connectivity Hardware

    General Motors (Sunnyvale, CA)
    …of our mission! GM is seeking a passionate and experienced **Principal Engineer of Connectivity Hardware** to lead the development of in-vehicle connectivity ... hardware, including component selection, system architecture, schematics, and PCB layout . Oversee the full development cycle from concept through production.… more
    General Motors (07/18/25)
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  • Sr Solutions Engineer (Analog Mixed Signal…

    Cadence Design Systems, Inc. (San Jose, CA)
    …an impact on the world of technology. We are looking for an experienced engineer to drive the latest innovations in Virtuoso Solution team to improve analog design ... signal circuit design development in FinFet nodes , basic layout knowledge is a plus.* Should be hands-on and...tools, creating and analyzing testbench. * Experience with Virtuoso Layout editor and VSE, ADE and Spectre.* Scripting knowledge… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Facilities Engineer

    Fujifilm (Santa Clara, CA)
    **Position Overview** The Facilities Engineer IV plans facilities changes for plant, office, and production equipment layouts, working toward economy of operation, ... Coordinates with architecture/engineering firms in developing design criteria and preparing layout and detail drawings. Prepares bid sheets and contracts for… more
    Fujifilm (07/16/25)
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  • Principal Test Engineer

    Palo Alto Networks (Santa Clara, CA)
    …next generation network firewalls. We are looking for a talented test engineer with extensive experience in developing diagnostics and validation. The ideal ... in PRD discussions, system and diagnostic design, schematic and layout reviews + Architect and implement modular, extensible, and...and BIOS/UEFI. + Ability to read and interpret schematics, layout files, and system block diagrams, and use this… more
    Palo Alto Networks (07/14/25)
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  • Foundry RF IC Technology Development Integration…

    Broadcom (San Jose, CA)
    …**Job Description:** Senior RF IC technology pathfinder and applications support engineer supporting multiple RF IC technologies for cellular front-end module ... DC and RF electrical characterization techniques and equipment + Experience with layout and circuit simulation tools (Cadence, Keysight ADS) + Experience with device… more
    Broadcom (07/12/25)
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  • Senior Signal and Power Integrity Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... data from lab measurements and/or modelling tool/methodology updates. + Substrate and board layout SI guidelines creation, review and post layout SI extractions.… more
    NVIDIA (07/11/25)
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  • Senior SRAM Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …operation, and DRC/DFM impact + Circuit Design: Transistor-level circuit design, layout implementation, physical and logical verification, and debug of SRAM macros ... years of SRAM design experience with strong background in layout , process understanding, and DRC rules on advanced FinFET...rapidly growing. If you are a creative and autonomous engineer with a real passion for technology, we want… more
    NVIDIA (07/08/25)
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