• Senior Machine Learning Engineer , Customer…

    Amazon (Santa Clara, CA)
    …seamless integration of LLM models into production environments, ensuring rigorous testing and validation protocols. - Lead the creation of a sophisticated ML ... and agent speak different languages. Key job responsibilities - Architect and lead the development of robust inference infrastructure for Amazon's conversational AI… more
    Amazon (09/06/25)
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  • Senior Project Engineer Mission Platform…

    General Atomics (Poway, CA)
    …well as advanced high-resolution surveillance systems. Staff Project Engineers lead multi-disciplinary teams, innovate, design, integrate, test, qualify, and rapidly ... high performing technical contributors and future leaders. This candidate's will lead , support strategic objectives, stitch together systems of systems, develop… more
    General Atomics (08/20/25)
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  • Senior SAP PTP Engineer , Application…

    Cardinal Health (Sacramento, CA)
    …**_Responsibilities_** + Responsible for the functional design, configuration, and validation of the SAP solutions supporting SAP MM, logistics modules, ... determine gaps and define to-be processes and systems. + Lead the blueprint workshops and conduct sessions with business...business processes and related project implementation as needed + Lead and implement SAP PTP/SCE functions for large scale… more
    Cardinal Health (08/08/25)
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  • Manufacturing Engineer - Aircraft…

    General Atomics (Poway, CA)
    …enhance Quality/ Yield, reduce Cost, and improve Productivity/Schedule. Initiate and lead lean manufacturing process improvement projects. + Specify and implement ... from the early design development process, through pre-production pathfinder and validation test articles leading to stable production; influencing the product and… more
    General Atomics (08/08/25)
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  • Hardware Development Engineer II, AWS…

    Amazon (Cupertino, CA)
    …will do: As a member of the Server Hardware Engineering team you will own and lead the design and development of server products utilizing a wide range of design and ... team of component, firmware, test, qualification, and integration engineers, and lead our design and manufacturing partners to bring these servers to… more
    Amazon (09/23/25)
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  • Senior System Integration Engineer

    NVIDIA (Santa Clara, CA)
    …feature bring-up plans for new silicon, and participate in bring-up execution. + Lead debug efforts from the HW side to root cause feature sequence bugs, ... gating, clock sequencing, binning, and power throttling. + Hands-on validation experience with lab debugging and tools (oscilloscopes, multimeters,...is a plus. + Experience as a Silicon Bringup Lead . + Experience in succeeding in a highly matrix… more
    NVIDIA (09/23/25)
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  • Principal Engineer , Systems Design…

    SanDisk (Milpitas, CA)
    …to articulate the finding to cross-functional forums and to the higher management. + Lead discussion of new modes for next generation of NAND Flash or new operation ... test teams on NAND testing and screening methods + Work with the validation team on drive-level testing, debugging, failure analysis and qualification + Prepare and… more
    SanDisk (09/20/25)
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  • Quality Engineer II

    Abbott (Alameda, CA)
    …devices, consumer devices, and accessories. **What You'll Work On** + Lead /support design planning efforts to include heading cross-functional teams; establishing ... deliverables and tracking completion for complex projects + Lead /support complex investigations and CAPA activities + Drives alignment in cross functional meetings… more
    Abbott (09/12/25)
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  • Senior Low Power Integration Engineer

    NVIDIA (Santa Clara, CA)
    …features to address existing and new product opportunities/requirements. Lead technical return-on-investment investigations, create/maintain feature bring-up plans ... for new silicon and participate in bring-up execution. + Lead debug efforts from HW side to root cause...analysis, fault analysis, sampling, statistics, and scripting + Hands-on validation lab experience with silicon bringup, lab debug and… more
    NVIDIA (09/01/25)
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  • STA Principal Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …advanced technologies. . Performing timing correlation, tool feature benchmarking, constraints validation , spice analysis on various tech nodes and customer designs. ... Tree, RC Extraction and UPF/CPF concepts. . Execute and lead Tempus timing signoff campaigns at existing and new...in Static timing analysis, Individual should be able to lead and execute technical campaigns at various internal and… more
    Cadence Design Systems, Inc. (08/14/25)
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