• Senior ASIC Design Engineer - Circuits

    NVIDIA (Santa Clara, CA)
    …(or equivalent experience) + 6+ years of proven experience and a background in logic design , Verilog and/or System-Verilog with a deep understanding of physical ... We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team...NVIDIA's next generation GPUs + Partner with RTL and Design Verification engineers to ensure delivery meets performance and… more
    NVIDIA (11/26/25)
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  • Senior Digital Design Engineer - High-Speed…

    NVIDIA (Santa Clara, CA)
    design flow and tools. + Deep understanding of Verilog or System Verilog, logic design concepts, and typical structures. + Good understanding of design ... which then will be translated into RTL and firmware designs. For backend design , you will define, build synthesis constraints and drive timing closure. Evaluating… more
    NVIDIA (09/09/25)
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  • Nvidia 2026 Internships: Hardware Physical…

    NVIDIA (Santa Clara, CA)
    Design + VLSI, Computer Architecture, Digital/Micro Electronics, Mixed-Signal Design , Digital Design , Logic Design + CAD and Physical Design ... interest in one of our 202 6 Hardware Physical Design / VLSI Internships. We'll review resumes on an...C, C++, TCL, SPICE, Linux, Verilog, SKILL, Make, ICC2, Design Compiler, PrimeTime (Synopsys, First Encounter), Innovus, Virtuoso (Cadence)… more
    NVIDIA (09/02/25)
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  • Digital IC Design - Custom Power Products…

    Texas Instruments (Santa Clara, CA)
    …requirements:** + 3-5 years of relevant experience + A thorough understanding of digital logic design + Familiarity with the Verilog language and simulators + A ... process technology, as well as be involved in the design of high performance digital circuits interfacing to leading...at the circuit level and behavioral level. As a design engineer, you will prepare test methods and specifications,… more
    Texas Instruments (11/15/25)
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  • Senior Digital Design Engineer

    BrainChip, Inc. (Laguna Hills, CA)
    …or related degree or certification required 10+ years of experience in digital logic design Good understanding of modern computational architectures Fluent in ... BrainChip is seeking a Senior Digital Design Engineer to join a team working on...job function is to work with team members to design and develop digital modules from concept stage to… more
    BrainChip, Inc. (09/11/25)
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  • Principal FPGA Electrical Engineer

    Oracle (Santa Clara, CA)
    …communication bus is preferred._ + _Strong knowledge and application of high-speed design methodologies for FPGA logic ._ + _Solid understanding of digital ... design principles and synchronous design techniques._ + _Experience with Logic level interface of service processors._ + _Proficient in the complete flow of… more
    Oracle (11/25/25)
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  • Senior Custom ASIC Engineering Lead

    Broadcom (Irvine, CA)
    …skills are nice to have:** + Exposure to SERDES communications protocols. + Logic design , chip architecture, microarchitecture, Verilog RTL coding Front-end ... logic design verification, DRC, logic synthesis + Knowledge of DFT methods including scan, memory BIST and repair **Education and Experience required:** +… more
    Broadcom (11/06/25)
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  • Product Engineering Intern - Genus Synthesis…

    Cadence Design Systems, Inc. (San Jose, CA)
    …below) through coursework or projects. + Strong understanding of HDLs (Verilog/SystemVerilog), logic design , and timing analysis. + Proficiency in scripting ... VLSI design . + Academic or past work experience in EDA, logic synthesis, physical design , or timing closure is a plus. + Familiarity with Cadence tools such… more
    Cadence Design Systems, Inc. (10/29/25)
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  • Control & Process Engineer (Onsite)

    RTX Corporation (Carlsbad, CA)
    …and ensure smooth, repeatable operations from run to run. Key Responsibilities + Control Logic & Automation: Design and implement Siemens PLC ladder logic ... Partner with manufacturing, R&D, and equipment engineering teams to implement design changes, improve control logic , and drive continuous improvement… more
    RTX Corporation (11/05/25)
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  • Senior Silicon Bringup and Test Lead, Raxium

    Google (Fremont, CA)
    …Circuit/System on Chip (ASIC/SoC) design , with a focus on both digital logic design and Design for Testability (DFT) implementation. + Experience ... of the Design -for-Test (DFT) plan. + Architect, design , and implement digital logic utilizing verilog or system verilog, deriving from specifications. +… more
    Google (11/22/25)
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