• PCB Design Engineer , Spectacles, L5

    Snap Inc. (Los Angeles, CA)
    …(PCB) designs from prototype through mass production using Allegro PCB Designer. + Design high density PCBs, flexes, and rigid flexes requiring the use of stacked ... packages. + Create fabrication and assembly drawings. + Define design rules, apply them to the constraint manager, ...to understand and follow instructions. + Skill in using logic and reasoning to identify the strengths and weaknesses… more
    Snap Inc. (08/13/25)
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  • Sr VLSI Design Engineer (Physical…

    SanDisk (Milpitas, CA)
    design . **ESSENTIAL DUTIES AND RESPONSIBILITIES:** + Drive all aspects of physical design , including logic synthesis, place and route (P&R), and timing ... verification with EDA CAD tools **Preferred Skills:** + Familiarity with logic & physical design principles. + Knowledge of scripting in some of these languages:… more
    SanDisk (09/11/25)
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  • Senior Digital Design Engineer

    BrainChip, Inc. (Laguna Hills, CA)
    BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... part of our Hardware Development group. The Sr. Digital Design Engineer needs to be able to...or certification required 10+ years of experience in digital logic design Good understanding of modern computational… more
    BrainChip, Inc. (09/11/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI… more
    NVIDIA (09/09/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... experience) + 6+ years of proven experience and a background in logic design , Verilog and/or System-Verilog with a deep understanding of physical design more
    NVIDIA (08/27/25)
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  • DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in DSP ... and developing flows at all phases of the digital design and functional verification. It is further expected that...Substantial experience with Verilog is required, as are excellent logic and debug skills. Engineering expertise in mixed-signal IP… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Staff ASIC Design Verification…

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer , Platforms and Devices + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Mountain View, CA, USA ... projects from concept to product release. + Experience strategizing and verifying digital logic at RTL and GLS level using SystemVerilog or C/C++ or Universal… more
    Google (10/01/25)
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  • FPGA Digital Design Engineer 3/4

    Northrop Grumman (Los Angeles, CA)
    …making history. Northrop Grumman Advanced Weapons has an opening for a FPGA Digital Design Engineer with an active clearance, to join our team of qualified, ... circuitry for digital electronic equipment and other hardware systems. Determines design approaches and parameters. Analyzes equipment to establish operating data,… more
    Northrop Grumman (09/27/25)
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  • Senior System Design Engineer

    NVIDIA (Santa Clara, CA)
    …life's work, to amplify human creativity and intelligence. We are now looking for a System Design Engineer in the System Product Team. In this role, you will be ... working with peer system design engineers to develop NVIDIA GPU/Tegra based products for...with using lab tools such as oscilloscopes, multimeters, and logic analyzers. + Comfortable working in various Linux environments… more
    NVIDIA (08/19/25)
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  • Physical Design Engineer (Einfochips…

    Arrow Electronics (San Jose, CA)
    **Position:** Physical Design Engineer (Einfochips Inc) **Job Description:** **What candidate will Be Doing:** + Netlist to-GDSII implementation, including ... top-level floorplanning,, Design partitioning, Top level block to block/over the block...automation and flow development. + Expertise in clock gating, logic optimization, and integration of high-speed interfaces like DDR… more
    Arrow Electronics (09/10/25)
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