• Senior Silicon Bringup and Test Lead, Raxium

    Google (Fremont, CA)
    …Circuit/System on Chip (ASIC/SoC) design, with a focus on both digital logic design and Design for Testability (DFT) implementation. + Experience with ... of the Design-for-Test (DFT) plan. + Architect, design, and implement digital logic utilizing verilog or system verilog, deriving from specifications. + Work… more
    Google (01/07/26)
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  • Manufacturing Automation Engineer II

    Ferrotec USA (Livermore, CA)
    …troubleshoot, and repair existing, new, or upgraded control systems, including soft logic , human/machine interface, wiring, and hard logic . Mark-up schematics, ... related experience + Programming languages: + C# - For low level programming + TwinCat/Ladder logic - PLC programming + XML - Configuration + XAML - Screen control +… more
    Ferrotec USA (01/06/26)
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  • Marketing Specialist, Operations

    LiveRamp (San Francisco, CA)
    …lead upload reviews + List management: Build target lists, manage segmentation logic , validate suppression rules, and ensure campaign targeting accuracy + Data ... + Pre-launch QA: Review campaign builds for accuracy including segmentation logic , suppression lists, UTM parameters, form configurations, and routing rules +… more
    LiveRamp (01/06/26)
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  • ASIC Chip Lead

    Broadcom (Irvine, CA)
    …in Microarchitecture & RTL Design + Detailed understanding of RTL design, logic synthesis, static timing analysis, design verification, clock domain crossing, and ... low power design techniques + Strong Logic Design & RTL Design Skills using Verilog HDL...designs + Able to work in a lab with logic analyzers and oscilloscopes during Silicon/FPGA bring up +… more
    Broadcom (12/16/25)
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  • Senior Circuit Verification Engineer

    NVIDIA (Santa Clara, CA)
    …tools such as ESP-CV, Conformal-LEC, Insight-ERC, etc. + Familiarity/experience with digital logic and SRAM design (decoders, dynamic logic , sense amps). + ... of digital and RAM circuits is a plus + Experience with RTL, logic synthesis and verification, knowledge of Place and Route, and understanding of Design-for-test… more
    NVIDIA (12/09/25)
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  • Staff Embedded Software Engineer

    General Motors (Mountain View, CA)
    …Debug complex hardware bring-up issues and integration failures using JTAG debuggers, logic analyzers, oscilloscopes, and serial tools. + Work with tools and ... protocols (CAN, LIN, DoIP, UDS), hardware debugging tools (JTAG, logic analyzers, serial consoles), embedded toolchains, container technologies for embedded… more
    General Motors (12/03/25)
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  • FPGA Design Engineer

    Applied Materials (Santa Clara, CA)
    …boards. **Key Responsibilities** **FPGA & Zynq Development** * Design and implement FPGA logic using Vivado, IP Integrator, and Vitis. * Develop RTL modules in ... custom boards). * Perform hardware debugging using ILA, oscilloscopes, and logic analyzers. * Conduct performance tuning for timing closure, throughput, latency,… more
    Applied Materials (11/27/25)
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  • Senior ASIC Physical Design and Timing Engineer

    NVIDIA (Santa Clara, CA)
    …in physical design and optimization eg, placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power, along with a background ... in implementing them through ECOs. + Background in logic synthesis and equivalence checking/FV. + Expertise and in-depth...Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various… more
    NVIDIA (11/22/25)
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  • Software Intern, Summer (Synthesis)

    Cadence Design Systems, Inc. (San Jose, CA)
    …contribute to the development of the Genus Synthesis Solution, a state-of-the-art logic synthesis tool that optimizes Power, Performance, and Area (PPA) for advanced ... software programs on Unix/Linux platforms. + Develop and enhance algorithms for logic synthesis and physical design flows. + Validate new synthesis features and… more
    Cadence Design Systems, Inc. (11/15/25)
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  • Senior High-Speed IO Validation Engineer

    NVIDIA (Santa Clara, CA)
    …and release to production. + Coordinate with internal and external logic design, circuit design, board design, Simulation, diagnostics, firmware, driver, and ... and its operation at a system level. + Experienced in the operation of logic and protocol analyzer, and protocol exercisers. + Good knowledge of lab equipment (DSOs,… more
    NVIDIA (11/12/25)
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