• ASIC Digital Design Engineer

    Teledyne (Goleta, CA)
    …chains, BIST for ASIC testability). + Clock/ Power optimization for low - power ASICs. + Perform Back-End Physical Design as needed + Floorplanning and ... team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer : Oversees definition, design ,... power grid design . + Place and Route (APR) with congestion management.… more
    Teledyne (11/21/25)
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  • RFIC Design Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... possible, with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch… more
    SpaceX (10/23/25)
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  • Senior Mechanical Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …Career** Palo Alto Networks is seeking an experienced and highly motivated Mechanical Design Engineer with some network equipment design experience looking ... leads and other cross functional teams in developing high-quality, low -cost system design solutions. Additionally, you must...Skilled with 3D CAD software such as SolidWorks or Pro/ Engineer + Experience with manufacturing and design more
    Palo Alto Networks (12/19/25)
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  • Sr. RTL Design Engineer - Wireless…

    Amazon (San Diego, CA)
    …in locations without reliable connectivity. Come work at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design ... Description Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is...to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing… more
    Amazon (01/02/26)
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  • RTL Design Engineer , University…

    Google (Sunnyvale, CA)
    …+ Knowledge of processor design or accelerators. + Knowledge of high-performance and low power design techniques. + Knowledge of processor design , ... RTL Design Engineer , University Graduate, PhD, Machine...team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to… more
    Google (12/18/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …multiple vendor solutions and driving tool decisions. - Experience in high-performance, low - power physical design , and implementation techniques with ... learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server… more
    Amazon (12/02/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …Computer Engineering, relevant technical field, or equivalent practical experience 13. Experience with low power design and optimization to help meet the ... **Summary:** As a Digital Design Engineer at Meta Reality Labs,... power requirements 14. Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators… more
    Meta (12/20/25)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …PPA flow development and support. Preferred Qualifications - Expertise in high-performance, low - power physical design , and implementation techniques with ... and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
    Amazon (10/25/25)
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  • Senior ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    …- 10 years or more of practical experience - Experience with wide variety of low power design techniques - Working experience with high performance industry ... help us create? The Role: As a Senior ASIC Design Engineer , you will be part of...from architecture guidelines and model analysis. - Experience in performance/ power /area analysis and trade-offs - Proficient in design more
    Amazon (12/12/25)
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  • Senior Engineer , Front End Computer Aided…

    Microsoft Corporation (Mountain View, CA)
    …hand-off to backend and Logic Design compilation, elaboration in addition to experience in Low Power design . - 5+ years of experience in digital ... Design , Design Verification, Validation, DFT, Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff...silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the development and adoption of cutting-edge… more
    Microsoft Corporation (12/03/25)
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