• Product Security Engineer II

    IBM (San Jose, CA)
    …cloud-native software solutions. Our renowned legacy creates endless global opportunities for our network of IBMers. We are a team of deep product experts, ensuring ... portfolio. **Your role and responsibilities** We are looking for a Product Security Engineer II to help scale our product security function, partnering closely with… more
    IBM (09/17/25)
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  • Senior Automation Engineer , ARS-Oxr1-Rme

    Amazon (Oxnard, CA)
    …Come join us on our journey! About the Role: As a Senior Automation Engineer , you will play a crucial role in maximizing equipment reliability and operational ... team, and Safety to support MHE systems optimization and project implementation - Understand, maintain and troubleshoot material handling control systems, including… more
    Amazon (09/16/25)
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  • Active Directory / Windows Engineer

    OSI Digital (Irvine, CA)
    Job Description Role: Active Directory / Windows / VMWare Engineer Location: Irvine CA Duration: Full time / Contract to hire Experience + 10+ years experience in ... scripts for automating processes within the environment. + Collaboration with network , InfoSec, storage, data center, vendors, and other stakeholders in support… more
    OSI Digital (09/12/25)
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  • Senior Staff Security Engineer , Robotics…

    Google (Mountain View, CA)
    …and ethics are the highest priority. About the Role As a Senior Staff Security Engineer focusing on Robotics and Physical AI, you'll be at the forefront of securing ... Responsibilities + Security Architecture & Strategy: Lead the development and implementation of comprehensive security architectures and strategies for all aspects… more
    Google (09/12/25)
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  • DevSecOps Engineer (AWS) - Remote

    EVOTEK, Inc. (San Diego, CA)
    …business, we integrate cutting-edge technical expertise across data center, network , security, cloud, and communications domains. By delivering cohesive digital ... for you. Role Summary We are seeking a DevOps Engineer to join our team! You will design and...growth/fast paced environment. + Proven track record of leading implementation of release engineering best practices, both processes and… more
    EVOTEK, Inc. (09/12/25)
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  • Principal Engineer , VLSI Design…

    SanDisk (Milpitas, CA)
    …recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability ... of innovation. We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory...chip lead, and full product life cycle (requirements, design, implementation , test) of Logic design + Working knowledge of… more
    SanDisk (09/11/25)
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  • Staff Engineer , VLSI Design…

    SanDisk (Milpitas, CA)
    …recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability ... of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory...chip lead, and full product life cycle (requirements, design, implementation , test) of Logic design + Working knowledge of… more
    SanDisk (09/10/25)
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  • Senior Logic Design Engineer - Physical…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the design of ... CPU on-chip interconnect network and last-level caches , working closely with the..., working closely with the physical design team on implementation , synthesis and timing closure as well as working… more
    NVIDIA (09/10/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve timing...specific STA and timing convergence, such as GPUs, CPUs, DPUs/ Network processors, or SOCs + Understanding of DFT logic… more
    NVIDIA (09/10/25)
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  • Physical Design Engineer (Einfochips Inc)

    Arrow Electronics (San Jose, CA)
    **Position:** Physical Design Engineer (Einfochips Inc) **Job Description:** **What candidate will Be Doing:** + Netlist to-GDSII implementation , including ... repeater flops and balance flop concepts, Top level Clock structure planning, Clock network SPICE simulation, power mesh planning, and full signoff (DRC, LVS, STA,… more
    Arrow Electronics (09/10/25)
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