• Bioinformatics Engineer II (18 Month…

    Stanford University (Stanford, CA)
    Bioinformatics Engineer II (18 Month Fixed-Term) (Hybrid Opportunity) **School of Medicine, Stanford, California, United States** Information Analytics Post Date Oct ... of Cardiovascular Medicineat Stanford University is seeking a talented Bioinformatics Engineer II to join the Bioinformatics Core (BIC) of the Molecular… more
    Stanford University (10/15/25)
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  • Senior Failure Analysis Engineer

    NVIDIA (Santa Clara, CA)
    …innovation at NVIDIA Silicon Failure Analysis Lab. We're seeking an expert Failure Analysis Engineer to join our diverse team in Santa Clara, CA. As a key member ... ICs, boards, and systems, featuring sophisticated semiconductor process and packaging technologies! What you'll be doing: + Perform and...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
    NVIDIA (10/14/25)
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  • Principal Product Development Engineer

    Integra LifeSciences (Irvine, CA)
    …patient outcomes and set new standards of care. The Principal Product Development Engineer will lead major system projects of varying scope and complexity across ... Integra with a focus on neurological diseases. The Principal Product Development Engineer will be responsible for the complete development of the mechanical,… more
    Integra LifeSciences (10/08/25)
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  • Maintenance Engineer -Columbus Craft Meats…

    Hormel Foods (Hayward, CA)
    **MAINTENANCE ENGINEER - COLUMBUS (HAYWARD, CA)** Opening: 5:30a-3:00p with some weekend coverage From a small, old world Italian craft meat shop in North Beach, San ... assigned plant physical assets (buildings, grounds, utility infrastructure, process, and packaging equipment) so that the lifetime value of the Company's investment… more
    Hormel Foods (01/02/26)
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  • EDA Workflow Optimization Engineer

    NVIDIA (Santa Clara, CA)
    …GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our engineering ... process from inception through study, architecture, design, verification, emulation, layout, packaging , power-on and production. You will then guide teams to… more
    NVIDIA (01/02/26)
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  • R&D Engineer Mechanical

    Broadcom (San Jose, CA)
    …please Sign-In before you apply.** **Job Description:** As a Principal Hardware Engineer , you will design, develop, and deliver Mechanical assemblies, including full ... interdisciplinary team of Hardware, ASIC, Signal, Mechanical, Thermal, Diagnostic, Packaging , and Manufacturing engineers. In addition, Joint development programs… more
    Broadcom (01/01/26)
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  • Lead Project Engineer - Electrical…

    Kiewit (Irvine, CA)
    …Industrial **Employment Type:** Full Time **Position Overview** The Project Engineer will support construction activities by planning, organizing, and implementing ... needed + Develop and manage the contract closeout plan and deliverables. Manage packaging and submission for successful and on time completion of contracts. +… more
    Kiewit (12/31/25)
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  • Engineer , DPA (Destructive Physical…

    Eurofins US Network (Irvine, CA)
    …meeting evolving technological and business needs. **Job Description** The **DPA Engineer ** leads and performs advanced analysis on integrated circuits, components, ... + 5+ years of relevant experience in failure analysis, semiconductor packaging , or electronics reliability. **Job Knowledge, Skills, and Ability:** + Expertise… more
    Eurofins US Network (12/30/25)
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  • Embedded Software Engineer (System)

    TP-Link North America, Inc. (Irvine, CA)
    …our embedded software ecosystem. We are seeking a talented Embedded Software Engineer (System) to design, develop, and maintain core system software, including Linux ... frameworks across multiple SoC vendors. + Hands-on experience with software packaging , API design, and makefiles in complex build environments. + Familiarity… more
    TP-Link North America, Inc. (12/25/25)
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  • SoC Silicon Top-Level Floorplan Engineer

    Google (Sunnyvale, CA)
    SoC Silicon Top-Level Floorplan Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, solving ... design experience (eg, multi-die partitioning, TSV planning, advanced chiplet and packaging technologies, optimizing PPA, and physical verification in a SiP… more
    Google (12/20/25)
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