- Meta (Sunnyvale, CA)
- …concepts to mass production. **Required Skills:** Audio Transducer Design Engineer Responsibilities: 1. Primary cross-functional interface with PD ... is a vital facet. As an Audio Transducer Design Engineer you will have a high degree of device...state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface modeling to ... PCIe, LPDDR) and clock/data alignment constraints. + Work closely with RTL and PD teams to extract clocking intent and drive accurate constraint generation from RTL… more
- Microsoft Corporation (Mountain View, CA)
- …and augmented reality. We are looking for a ** ** **Principal Analog Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) ... Logic design and Physical design teams. + Interface with architecture, physical design ( PD ), design for test (DFT), and other teams to optimize tradeoffs within the… more
- Arrow Electronics (San Jose, CA)
- **Position:** Physical Design Engineer IV (eInfochips Inc.) **Job Description:** Principal Accountabilities * Responsible for complete flow of Netlist to GDSII, PnR, ... design, etc. * Partner in methodology development activities. * Work on PD projects to meet specific functional and technical specifications and requirement. *… more
- Google (Goleta, CA)
- …+ Knowledge of digital architecture/logic design techniques and principles. As a Silicon Engineer , you will be a vital member of the quantum electronics team, ... work as part of a team of digital, DV, Physical Design ( PD ), and RF/analog/mixed-signal engineers, collaborating with adjacent teams in the electronic, software,… more
- Amazon (Cupertino, CA)
- …of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring ... route, STA, IR, formal and physical verification. - Demonstrated level of expertise in PD tools such as Innovus, ICC2, Fusion Compiler, STA, and Sign-Off. - Proven… more
- Cisco (San Jose, CA)
- Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... the RTL. + Work closely with the design/design-verification and PD teams to enable the integration and validation of...hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All… more
- NVIDIA (Santa Clara, CA)
- …a lasting impact on the world. Join NVIDIA as a Senior SoC Design Engineer developing innovative SoC solutions. What you'll be doing: + Work in NVIDIA's semi-custom ... SoC IP design, timing closure, power analysis, methodology alignment, and program execution, ensuring success from pre-silicon through post-silicon stages. + Partner… more
- Amazon (San Diego, CA)
- …the world. Come work at Amazon! The Role: As Senior SERDES Design Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design ... SERDES ATE techniques (BIST, loopbacks, etc) - Familiarity with IP deliverables and PD (LEF, LIB, timing closure, EMIR, etc.) - Familiarity with SERDES AFE design… more
- Amazon (Sunnyvale, CA)
- …TV and Amazon Echo. What will you help us create? As a Product Development Engineer on our team, you will be responsible for the mechanical design, development, and ... exceptional user experience. You will work in a small PD team to create a new experience and work...team * Perform feature design and testing to meet program objectives * Perform test failure analysis and solution… more