• Senior Timing and Constraints Methodology…

    NVIDIA (Santa Clara, CA)
    …We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering timing sign-off strategies for next-generation GPUs and ... to build signoff-accurate timing environments. + Write automation scripts in Perl , Python, and C++ for constraint generation, validation, and structural checks.… more
    NVIDIA (05/29/25)
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  • ASIC Verification Engineer - New College…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the process ... least one of the following languages: SystemVerilog, C and/or C++, Python and/or Perl + Deep knowledge of object-oriented programming concepts Ways to stand out from… more
    NVIDIA (05/22/25)
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  • Senior Async and IO Timing Methodology…

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface modeling to ... clock domain crossings, and I/O interface timing. + Proficient in scripting (TCL, Perl , Python) for automation and flow development. + Experience working with STA… more
    NVIDIA (05/22/25)
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  • DV CAD Engineer

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification, you ... using simulators, VIPs, testbenches, emulators Strong experience scripting (Python, Perl ) in support of design verification including regression systems, CI/CD,… more
    Qualcomm (05/19/25)
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  • FIPS Compliance Engineer

    Broadcom (Palo Alto, CA)
    …Sign-In before you apply.** **Job Description:** The Sr FIPS Compliance Engineer performs assessments of cryptographic security functions including in their use ... and/or validations as a vendor) + Experience with C, C++, Java languages, Perl , Ruby and development environments + Strong knowledge of computer security principles… more
    Broadcom (05/17/25)
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  • Functional Verification Applications…

    Siemens (Fremont, CA)
    …to expect competent leadership from our managers and executives.This Applications Engineer (AE) position delivers technical expertise for Functional Verification of ... Simulation of complex SoC environments, makefile creation, use of Python, Perl , C/C++ scriptsStrong trouble shooting, triage and debugging skillsDeep knowledge of… more
    Siemens (05/17/25)
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  • Senior RTL Analysis Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving challenging problems ... CDC, RDC and Formal. + Proficiency in one or more scripting languages (eg: Perl , Python, Tcl) and Make. + Proficiency in Verilog SystemVerilog HDL. + Excellent… more
    NVIDIA (05/16/25)
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  • Silicon Validation Engineer

    Qualcomm (San Diego, CA)
    …Group > GPU ASICS Engineering **General Summary:** We are looking for a motivated engineer with passion for problem solving to join our team and work on our ... The candidate must possess/have: -- Excellent C/C++ programming skills -- Excellent Perl /Python scripting skills -- Knowledge in the power consumption concepts in… more
    Qualcomm (05/15/25)
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  • Staff Silicon Engineer , IP Design…

    Google (Mountain View, CA)
    …+ Experience in coding with C or C++, and scripting languages, such as Perl or Python. + Experience in RTL coding using Verilog or SystemVerilog. **Preferred ... qualifications:** + Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. + 10 years of experience in the field of ASIC/SoC development. + Experience across the full… more
    Google (08/08/25)
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  • Physical Design Flow and Methodology…

    Google (Sunnyvale, CA)
    …automated physical design workflows from RTL to GDS, utilizing Tcl, Python, or Perl . + Experience with physical design implementation and convergence at the block ... and subsystem levels. **Preferred qualifications:** + Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. + Experience leading physical design end-to-end execution from RTL to… more
    Google (08/08/25)
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