• ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a agile team...10. Experience in EDA tools and scripting (Python, TCL, Perl , Shell) used to build tools and flows for… more
    Meta (08/01/25)
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  • ASIC Engineer , Formal Verification

    Meta (Sacramento, CA)
    **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... (SoC) for data center applications. As a Formal Verification Engineer , you will be part of a team working...SVA 16. Proficiency in scripting languages such as Python, Perl , or Tcl 17. Experience with JasperGold or VC-Formal… more
    Meta (08/01/25)
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  • Senior CAD Engineer , Physical Design

    NVIDIA (Santa Clara, CA)
    We are now hiring for a Senior CAD Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the ... Technologies Group is looking to hire a Senior CAD Engineer in our Standard Cell Library development team. Do...library validation and release flow. + Write scripts using Perl , Python, tcl, Cadence SKILL, and C++. + Work… more
    NVIDIA (07/29/25)
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  • AMS CAD/Analog Engineer

    Capgemini (Santa Clara, CA)
    **About the job you're considering** The Integrated Circuit (IC) CAD Engineer - Analog Mixed-Signal Flow Automation role at involves supporting IC design teams in ... ability to work with remote teams + Excellent programming skills in languages: SKILL, Perl ; Python is a plus + Strong fundamentals in software development + Solid… more
    Capgemini (07/24/25)
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  • Circuit Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    …time to join our team! We are now looking for a Circuit Design Engineer ! Are you interested in defining the next generation of Hardware for Artificial Intelligence? ... and security. Come join us in our mission to engineer the next generation of world class products. What...logic design. + Proficiency in scripting language, such as, Perl , Tcl, Make and automation methods/algorithms. + Prior leadership… more
    NVIDIA (10/10/25)
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  • Software Engineer Intern, Machine Learning…

    Meta (Sunnyvale, CA)
    …week duration with 2026 start dates only. **Required Skills:** Software Engineer Intern, Machine Learning (PhD) Responsibilities: 1. Develop highly scalable ... in systems software or algorithms 9. Experience coding in Java, C/C++, Perl , PHP, or Python 10. Interpersonal experience: cross-group and cross-culture collaboration… more
    Meta (10/09/25)
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  • Principal FPGA / Rtl Design Engineer…

    Silvus Technologies (Los Angeles, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA Engineering_ on ... MATLAB skills. + Solid knowledge and understanding of scripting languages such as Perl and Python. + Strong communication and presentation skills. + Experience with… more
    Silvus Technologies (10/08/25)
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  • CAD Engineer , Physical Design - New…

    NVIDIA (Santa Clara, CA)
    …to join our team! The Advanced Technologies Group is looking to hire a CAD Engineer , Physical Design - New College Grad 2026 in our Standard Cell Library development ... library validation and release flow. + Write scripts using Perl , Python, tcl, Cadence SKILL, and C++. + Work...completed a BS or MS in Computer Science, Computer Engineer , Electrical Engineering or related field (or equivalent experience).… more
    NVIDIA (10/08/25)
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  • Senior Applications Engineer - DDR Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team ... and be challenged? Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR IP by generating… more
    Cadence Design Systems, Inc. (10/04/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA engineering facility… more
    Silvus Technologies (10/03/25)
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