• Senior CAD Engineer, Physical Design

    NVIDIA (Santa Clara, CA)
    …a proven EE background with an in-depth understanding of circuits, layouts and VLSI design and enjoy working on the cutting edge of process technologies? Must have a ... standard cell templates in new process technologies. + Define and promote design for manufacturing (DFM) methodologies. + Improve library validation and release… more
    NVIDIA (07/29/25)
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  • Senior VLSI Design Engineering (New College…

    SanDisk (Milpitas, CA)
    …essential, along with a strong foundation in analog and digital circuit fundamentals. + ** Physical Design Engineering** - Physical Design Engineers will ... of design principles and CAD tools to develop scalable physical design methodologies. Familiarity with scripting (eg, Python, Perl, TCL) and an understanding… more
    SanDisk (07/19/25)
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  • Senior Silicon Logic Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …the verification team to ensure functional correctness + Interfacing with performance modeling, physical design , design -for-test, and other teams to deliver ... To achieve this goal, the Cloud Compute Development Organization (CCDO) Logic Design team is instrumental in defining and delivering operational measures of success… more
    Microsoft Corporation (08/27/25)
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  • Engineering Manager, Microarchitecture…

    Google (Sunnyvale, CA)
    …ASIC Verification, Design For Testing (DFT), Synthesis, Static Timing Analysis (STA), or Physical Design . In this role, you'll work to shape the future of ... establish timing, power and area design goals, and explore RTL/ design trade-offs for physical design closure. You will also work with Verification and… more
    Google (08/27/25)
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  • ASIC and/or FPGA Design & Verification…

    The Boeing Company (Huntington Beach, CA)
    … practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + ... & Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part… more
    The Boeing Company (08/20/25)
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  • Lead Electrical Engineer - Substation…

    Black & Veatch (Walnut Creek, CA)
    …classes + Develop electrical design deliverables, including protection and control design (protective relays) and/or physical design + Actively ... compliance with any applicable laws and regulations. **Preferred Qualifications** + Substation Design experience - Physical and/or Protection & Controls +… more
    Black & Veatch (07/05/25)
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  • Lead Electrical Engineer - Substation…

    Black & Veatch (Irvine, CA)
    …the substation quality management group (QMG). + Perform QA/QC of substation design packages, including physical design , protective relaying/control with ... in compliance with any applicable laws and regulations. **Preferred Qualifications** + Substation Design - Physical and/or P&C + Quality Assurance and Quality… more
    Black & Veatch (06/26/25)
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  • ASIC Design Technical Leader…

    Cisco (San Jose, CA)
    …and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you'll contribute to developing ... ASIC Design Technical Leader - Design &... team who oversees fullchip SDCs and works with physical design and DFT teams to close...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in… more
    Cisco (06/25/25)
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  • Senior ASIC Floorplan Design Engineer

    NVIDIA (Santa Clara, CA)
    …for the future of computing. What you will be doing: + Working with architects, design leads, physical design leads and package leads, you will develop ... System Verilog or similar HVL + Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution,… more
    NVIDIA (08/12/25)
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  • Senior ASIC Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... member, you will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage with multiple teams and design more
    NVIDIA (07/29/25)
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