• Sr. ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality… more
    SpaceX (08/22/25)
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  • Senior ASIC Design Engineer - Clocks…

    NVIDIA (Santa Clara, CA)
    … closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing… more
    NVIDIA (07/29/25)
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  • ASIC Clocks Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    … closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing… more
    NVIDIA (09/26/25)
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  • Senior Library Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now hiring for a Senior Library Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... join our diverse team today. The Advanced Technologies Group is looking to hire a Library Design Engineer in our group. Do you have a proven EE background with… more
    NVIDIA (09/04/25)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    …and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and ... We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented...What you will be doing: + Working with architects, design leads, physical design leads… more
    NVIDIA (08/12/25)
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  • Principal FPGA / Rtl Design Engineer…

    Silvus Technologies (Los Angeles, CA)
    …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... using Verilog and System-Verilog. + Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or… more
    Silvus Technologies (10/08/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...and System-Verilog. * Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple… more
    Silvus Technologies (10/03/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    … by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure a ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design ...+ Collaborate with architects, verification engineers, software engineers, and physical design engineers to accomplish your goals.… more
    NVIDIA (07/31/25)
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  • MTS Circuit Design Engineer , HSIO

    Micron Technology, Inc. (Folsom, CA)
    …communicate and advance faster than ever. We are searching for a High Speed I/O Design engineer at our Micron Technology's HBM Team in Folsom, California. As a ... high speed Design engineer , you will be working for...minimize source of clock jitter. + Determine sources of timing variation + Establish timing budgets related… more
    Micron Technology, Inc. (08/22/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... improving the netlist and timing quality of our designs and if you are...analysis on the design . + Drive the design and physical implementation of digital and/or… more
    NVIDIA (10/04/25)
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