- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device...experience (DFT + Debug logic/features) + Prior exposure to LINT/CDC/ timing constraints/etc + Verilog design experience -… more
- NVIDIA (Santa Clara, CA)
- …measurement, Reset and Boot controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis of several modules. + Integrate ... including RTL design , asynchronous and synchronous Reset design , synthesis, timing analysis, and Spyglass/CDC/RDC checks...CHI + Familiar with OCP secure boot specification and physical security handling process + Possess design … more
- Broadcom (San Jose, CA)
- …in Electrical Engineering or Computer Engineering with 6+ years of experience in Physical design .** + **Expert in Logic/ Physical Synthesis using advanced ... **Broadcom is looking for a senior level RTL synthesis engineer . In this highly visible role, you will be...for Timing , Area, Power.** + **Debug the timing /area/congestion issues and work with RTL & Physical… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- Staff Laser Engineer - LCLS Engineering Division Job ID 6520 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position overview:** The Linac ... a candidate to fill the position of Staff Laser Engineer . The successful candidate will help drive a dynamic...of investment. Over the next five years, LCLS will design and deliver a new suite of science instruments… more
- SpaceX (Sunnyvale, CA)
- …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer /Senior: $170,000.00 - $230,000.00/per year Your ... Sr. SOC/ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more
- SpaceX (Hawthorne, CA)
- …this team, we're looking for versatile, driven, and collaborative engineers. As an FPGA engineer on the satellite digital design team, you will be designing, ... FPGA Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded...+ Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, lab bring… more
- Northrop Grumman (Los Angeles, CA)
- …Level 3:** + Experience with DSP, MATLAB, and SimuLink + Knowledgeable in FPGA physical constraints and achieving timing closure. + Experience with board or ... Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 3** with the desire to learn new...The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In… more
- SpaceX (Hawthorne, CA)
- …team, we're looking for versatile, driven, and collaborative engineers. As an Sr. FPGA engineer on the satellite digital design team, you will be designing, ... Sr. FPGA Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded...+ Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, lab bring… more
- SpaceX (Hawthorne, CA)
- Sr. Propulsion Engineer (Merlin Turbomachinery) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... goal of enabling human life on Mars. SR. PROPULSION ENGINEER (MERLIN TURBOMACHINERY) As a Sr. Merlin Turbomachinery ...you will own all aspects of ongoing Merlin Turbopump design , development, qualification, and production support. In this role,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …engineer , who will be involved in developing a multi-threaded and distributed physical design core engine in Innovus Implementation System. The position ... experience working on IC physical designs toolsHands on experience using the above physical design tools for design closure and knowledge of physical… more
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